Cypress Semiconductor Cy8CKIT-050 Cy8CKIT-050B ユーザーズマニュアル

CY8CKIT-050 PSoC® 5LP Development Kit Guide, Doc. # 001-65816 Rev. *E

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Code Examples

5.4.3

Verify Output

In normal operation, the project displays the time starting from 00:00:00 when SW2 is pressed.
Normal mode is indicated by LED3 in ON state. When you press the SW2 button again, the device is
put to sleep. Sleep mode is indicated by LED3 in OFF state. If an ammeter is connected to measure
the system current (refer 

 for details), a system current of less

than 2 µA is displayed.

The device wakes up when SW2 is pressed again and displays the time on the LCD. The following
figures show the output display.

Figure 5-7.  PSoC 5 in Active Mode

Figure 5-8.  PSoC 5 in Sleep Mode

5.5.1

Project Description

This code example provides a platform to build CapSense-based projects using PSoC 5LP. The
example uses two CapSense buttons and one 5-element slider provided on the board. Each
capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pre-
tuned in the example code to take care of factors such as board parasitic.