Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL データシート

製品コード

PIC18F87K22-I/PTRSL

 2009-2011 Microchip Technology Inc.

DS39960D-page 59

PIC18F87K22 FAMILY

FIGURE 4-1:

TRANSITION TIMING FOR ENTRY TO SEC_RUN MODE

FIGURE 4-2:

TRANSITION TIMING FROM SEC_RUN MODE TO PRI_RUN MODE (HSPLL)

OSC1

Peripheral

Program

SOSCI

Counter

Clock

CPU

Clock

PC + 2

n-1

Clock Transition

(1)

PC + 4

Note 1:

Clock transition typically occurs within 2-4 T

OSC

Q3 Q4

OSC1

Peripheral

Program

SOSC

PLL Clock

PC + 4

Output

CPU Clock

PC + 2

Clock

Counter

Note 1:

OST

= 1024 T

OSC

; T

PLL

= 2 ms (approx). These intervals are not shown to scale.

Clock transition typically occurs within 2-4 T

OSC

SCS<1:0> bits Changed

PLL(1)

n-1 n

Clock

OSTS bit Set

Transition

(2)

OST(1)