Texas Instruments TPS65820 Evaluation Module TPS65820EVM TPS65820EVM データシート
製品コード
TPS65820EVM
FUNCTIONAL BLOCK DIAGRAM
RTC_OUT
AC
BAT
OUT
USB
TMR
ISET1
TS
I2C INTERFACE
AND INTERRUPT
CONTROLLER
INT
SDAT
SCLK
RESET
CONTROLLER
HOT_RST
RESPWRON
TRSTPWON
L1
PGND1
SM2
L2
L3
SM3
SIM
RED
BLUE
GREEN
SYS_IN
1.25V-3.3V
150 mA
LDO1
1.25V-3.3V
150 mA
LDO2
LDO3
1.224V-4.4V
100 mA
VIN_LDO35
1.224V-4.4V
100 mA
LDO4
LDO35_REF
ANLG1
ANLG2
GPIO1
GPIO2
3.3V
10 mA
LDO_PM
FB3
BAT
OUT
ADC_REF
GPIO3
AGND2
PGND3
VIN_SM1
VIN_SM2
PGND2
VIN_LDO12
DPPM
PWM
1.224V-4.4V
100 mA
LDO5
AGND1
LED_PWM
3.3V
150 mA
LDO0
AGND0
LDO3,4,5
LDO0,1,2
CONTROL
LOGIC
PWM
DRIVER
RGB
DRIVER
WHITE LED
DRIVER
DISPLAY AND I /O
GPIO’S
OUT
SM1
8 CHANNEL
MUX
A/D
CONVERTER
6 INTERNAL
CHANNELS
CHANNELS
SM3_SW
2.6V/3.1V
8 mA
POWER PATH
CONTROL
LINEAR
CHARGER
0.6-1.8V
600 mA
1.0V-3.4V
600 mA
LDO_PM
CHARGE
MANAGEMENT
DC/DC
HOST INTERFACE AND
SEQUENCING
ADC
AGND2
REFERENCE
SYSTEM
INTERNAL BIAS
OUT
OUT
OUT
TPS65820
SIM ,RTC LDOS
SYSTEM
POWER
ON/OFF
OUT
AGND1
AGND1
AGND1
OUT
AGND1
AGND 1
AGND1
OUT
AGND1
BAT
AGND1
AGND 0, AGND 1 AND AGND 2PINS SHORTED TO EACH OTHER INSIDE TPS 65800
. ALL AGND PINS ARE INTERNALLY CONNECTED TO
THE TPS 65800 THERMAL PAD AND SUBSTRATE
.
PGND 1, PGND 3 AND PGND 3PINS ARE NOT CONNECTED TO EACH OTHER OR TO THE TPS 65800 SUBSTRATE / POWER PAD
DISPLAY AND I /O
OUT
1.8V/3V
8 mA
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SLVS663B – MAY 2006 – REVISED APRIL 2008
Figure 1. TPS65820 Simplified Block Diagram
Copyright © 2006–2008, Texas Instruments Incorporated
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