Texas Instruments UCD3138 Digital Resonant LLC Converter Evaluation Module UCD3138LLCEVM-028 UCD3138LLCEVM-028 データシート
製品コード
UCD3138LLCEVM-028
List of Test Points
6
List of Test Points
Table 2. UCD3138CC64EVM-030 Test Points
TEST POINTS
NAME
DESCRIPTION
TP1
DGND
Digital GND
TP2
Not Used
TP3
Not Used
TP4
HSG
Primary high-side MOSFET gate, Q6
TP5
Input +
Input + after jumper J10
TP6
Input_P
Input voltage positive terminal
TP7
Input_N
Input voltage return terminal
TP8
LSG
Primary low-side MOSFET gate, Q7
TP9
HSS
Primary-side switch node, or the intersection of Q6 and Q7
TP10
SWC
Primary side, the intersection of bridge capacitors
TP11
SR_VDS1
Drain of secondary side sync FET Q8 and Q9
TP12
SR_VDS2
Drain of secondary side sync FET Q10 and Q11
TP13
IPS
Primary current sense
TP14
SR1
SR gate drive to Q8 and Q9
TP15
SR2
SR gate drive to Q10 and Q11
TP16
Vo_Ripple
Output voltage ripple
TP17
Vo_P
Output voltage positive terminal
TP18
Xmer_C
Power transformer center point of the secondary side windings.
TP19
GND_PWR
Power GND
TP20
Vo_N
Output voltage return
7
List of Terminals
Table 3. List of Terminals
TERMINAL
NAME
DESCRIPTION
J1
Bias Input
3 pin, external power input, 12 V
J2
Analog Signal
40-pin header, analog signal to control card (UCD3138CC64EVM-030)
J3
Digital Signal
40-pin header, digital signal to control card
J4
AJ
Analog signal connection, 40 pins
J5
UART1
Standard UART connection, RS232, 9 pin
J6
OVP-1
2-pin header, jump across to disable external OVP
J7
Not Used
J8
Input_P
Input voltage positive terminal
J9
Input_N
Input voltage return terminal
J10
Jumper
Reserved to an input fuse substitution
J11
Output_P
Output voltage positive terminal
J12
Output_N
Output voltage return terminal
12
Digitally Controlled LLC Resonant Half-Bridge DC-DC Converter
SLUU979A – August 2012 – Revised July 2013
Copyright © 2012–2013, Texas Instruments Incorporated