Microchip Technology MA180025 データシート
PIC18F87J90 FAMILY
DS39933D-page 114
2010 Microchip Technology Inc.
REGISTER 9-12:
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
U-0
R/W-1
R-1
R-1
R/W-1
R/W-1
R/W-1
R/W-1
—
LCDIP
RC2IP
TX2IP
CTMUIP
CCP2IP
CCP1IP
RTCCIP
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
LCDIP: LCD Interrupt Priority bit (valid when Type-B waveform with Non-Static mode is selected)
1
= High priority
0
= Low priority
bit 5
RC2IP: AUSART Receive Priority Flag bit
1
= High priority
0
= Low priority
bit 4
TX2IP: AUSART Transmit Interrupt Priority bit
1
= High priority
0
= Low priority
bit 3
CTMUIP: CTMU Interrupt Priority bit
1
= High priority
0
= Low priority
bit
CCP2IP: CCP2 Interrupt Priority bit
1
= High priority
0
= Low priority
bit
CCP1IP: CCP1 Interrupt Priority bit
1
= High priority
0
= Low priority
bit 0
RTCCIP: RTCC Interrupt Priority bit
1
= High priority
0
= Low priority