Microchip Technology MA180025 データシート
2010 Microchip Technology Inc.
DS39933D-page 13
PIC18F87J90 FAMILY
FIGURE 1-2:
PIC18F8XJ90 (80-PIN) BLOCK DIAGRAM
Instruction
Decode and
Control
Data Latch
Data Memory
(2.0, 3.9
Address Latch
Data Address<12>
12
Access
BSR
FSR0
FSR1
FSR2
FSR1
FSR2
inc/dec
logic
Address
4
12
4
PCH PCL
PCLATH
8
31-Level Stack
Program Counter
PRODL
PRODH
8 x 8 Multiply
8
BITOP
8
8
ALU<8>
Address Latch
Program Memory
(96 Kbytes)
Data Latch
20
8
8
Table Pointer<21>
inc/dec logic
21
8
Data Bus<8>
Table Latch
8
IR
12
3
PCLATU
PCU
W
Instruction Bus <16>
STKPTR
Bank
8
State Machine
Control Signals
Control Signals
Decode
8
8
ROM Latch
OSC1/CLKI
OSC2/CLKO
V
DD
,V
SS
MCLR
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Precision
Reference
Band Gap
Regulator
Voltage
V
DDCORE
/V
CAP
ENVREG
Kbytes)
PORTA
PORTC
PORTD
PORTE
PORTF
PORTG
RA0:RA7
(1,2)
RC0:RC7
(1)
RD0:RD7
(1)
RF1:RF7
(1)
RG0:RG4
(1)
PORTB
RB0:RB7
(1)
PORTH
RH0:RH7
(1)
PORTJ
RJ0:RJ7
(1)
Note 1:
See Table 1-3 for I/O port pin descriptions.
2:
RA6 and RA7 are only available as digital I/O in select oscillator modes. See Section 3.0 “Oscillator Configurations” for
more information.
more information.
3:
Brown-out Reset and Low-Voltage Detect functions are provided when the on-board voltage regulator is enabled.
Timing
Generation
INTRC
Oscillator
8 MHz
Oscillator
RE0:RE1,
RE3:RE7
(1)
BOR and
LVD
(3)
AUSART
Comparators
MSSP
Timer3
Timer2
CTMU
Timer1
CCP2
ADC
10-Bit
EUSART
LCD
Driver
Timer0
CCP1
RTCC