Microchip Technology MA180025 データシート
2010 Microchip Technology Inc.
DS39933D-page 237
PIC18F87J90 FAMILY
FIGURE 18-16:
I
2
C™ SLAVE MODE TIMING WITH SEN = 1 (RECEPTION, 10-BIT ADDRESSING)
SD
A
SC
L
S
S
P
IF
(P
IR
1
<
3>
)
B
F
(
S
S
PST
A
T
<0
>)
S
12
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
12
3
4
5
7
8
9
P
1
1
1
1
0
A
9
A
8
A
7
A
6
A
5
A
4A
3A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
1
D
0
Re
ce
ive
D
at
a
Byte
ACK
R/W
=
0
ACK
R
e
cei
ve
F
irst
B
yte
of A
ddr
ess
Cle
a
re
d
in
so
ftwa
re
D2
6
Cle
a
re
d
in
so
ftwa
re
R
e
cei
ve
S
econd B
yte o
f A
ddress
C
le
a
red
by ha
rdw
a
re
w
hen
S
S
P
A
D
D
is
upd
ated
w
ith
lo
w
byte o
f addr
ess af
ter
falling e
dge
U
A
(
S
SPS
TA
T
<
1
>
)
Clo
ck
is h
e
ld
lo
w u
n
til
update
of S
S
P
A
D
D
h
a
s
ta
ke
n pl
ace
UA
is se
t indicating
that
the
S
S
P
A
D
D
needs to
be
updat
ed
UA
is set indica
ting tha
t
S
S
P
A
D
D
ne
eds to
be
upd
ated
C
lear
ed b
y har
d
w
a
re
w
hen
S
S
P
A
D
D
is
updat
ed
w
ith
hi
gh
byt
e
of a
d
dre
ss af
ter f
a
lli
ng edg
e
SS
PBUF
is wr
itt
e
n
with
cont
ent
s of S
S
P
S
R
Du
m
m
y r
e
ad
o
f SSP
BUF
to clea
r B
F
fla
g
AC
K
CK
P
12
3
4
5
7
8
9
D7
D6
D5
D4
D3
D1
D0
Re
ce
ive
Da
ta
B
yte
B
us m
a
ste
r
term
inates
tran
sfer
D2
6
ACK
Cl
ea
re
d in
so
ftwa
re
Cle
a
re
d
in
so
ftwa
re
S
SPO
V
(
S
SPCO
N
1
<
6
>
)
C
K
P
writte
n to
‘1
’
No
te
:
A
n
upda
te of
the
S
S
P
A
D
D
r
e
gi
ster
be
fore
the
fa
lli
ng
e
dg
e
o
f th
e
n
in
th
clo
ck will h
ave
n
o
e
ffe
ct
on
UA a
n
d
UA will r
e
m
a
in
se
t.
No
te
:
A
n upd
ate o
f the
S
S
P
A
D
D
reg
ist
er
befor
e
t
he f
a
lli
ng
e
d
g
e o
f th
e
n
in
th
clo
ck will
have
no ef
fe
ct on
U
A
an
d
UA
will r
e
m
a
in
se
t.
in
s
o
ftw
a
re
Clo
ck is h
el
d lo
w u
n
til
upd
a
te of
S
S
P
A
D
D
has
ta
ken pl
ace
of
ni
nth cl
oc
k
of ni
nt
h cl
ock
S
S
P
OV
is set
be
cause S
S
P
B
U
F
is
still fu
ll.
A
C
K
is
not
sent.
D
u
mmy
read
of S
S
P
B
U
F
to clear
B
F
flag
Clo
ck is h
e
ld
lo
w u
ntil
CK
P
is set to
‘1
’
C
lo
ck i
s not
hel
d l
o
w
becau
se A
C
K
=
1