Microchip Technology MA180025 データシート
PIC18F87J90 FAMILY
DS39933D-page 300
2010 Microchip Technology Inc.
22.1
Comparator Configuration
There are eight modes of operation for the compara-
tors, shown in Figure 22-1. Bits, CM<2:0>, of the
CMCON register are used to select these modes. The
TRISF register controls the data direction of the
comparator pins for each mode. If the Comparator
tors, shown in Figure 22-1. Bits, CM<2:0>, of the
CMCON register are used to select these modes. The
TRISF register controls the data direction of the
comparator pins for each mode. If the Comparator
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown in
Section 28.0 “Electrical Characteristics”.
be valid for the specified mode change delay shown in
Section 28.0 “Electrical Characteristics”.
FIGURE 22-1:
COMPARATOR I/O OPERATING MODES
Note:
Comparator interrupts should be disabled
during a Comparator mode change;
otherwise, a false interrupt may occur.
during a Comparator mode change;
otherwise, a false interrupt may occur.
C1
V
IN
-
V
IN
+
Off (Read as ‘0’)
Comparator Outputs Disabled
A
A
CM<2:0> = 000
C2
V
IN
-
V
IN
+
Off (Read as ‘0’)
A
A
C1
V
IN
-
V
IN
+
C1OUT
Two Independent Comparators
A
A
CM<2:0> = 010
C2
V
IN
-
V
IN
+
C2OUT
A
A
C1
V
IN
-
V
IN
+
C1OUT
Two Common Reference Comparators
A
A
CM<2:0> = 100
C2
V
IN
-
V
IN
+
C2OUT
A
D
C2
V
IN
-
V
IN
+
Off (Read as ‘0’)
One Independent Comparator with Output
D
D
CM<2:0> = 001
C1
V
IN
-
V
IN
+
C1OUT
A
A
C1
V
IN
-
V
IN
+
Off (Read as ‘0’)
Comparators Off (POR Default Value)
D
D
CM<2:0> = 111
C2
V
IN
-
V
IN
+
Off (Read as ‘0’)
D
D
C1
V
IN
-
V
IN
+
C1OUT
Four Inputs Multiplexed to Two Comparators
A
A
CM<2:0> = 110
C2
V
IN
-
V
IN
+
C2OUT
A
A
From V
REF
module
CIS = 0
CIS = 1
CIS = 1
CIS = 0
CIS = 1
CIS = 1
C1
V
IN
-
V
IN
+
C1OUT
Two Common Reference Comparators with Outputs
A
A
CM<2:0> = 101
C2
V
IN
-
V
IN
+
C2OUT
A
D
A = Analog Input, port reads zeros always D = Digital Input CIS (CMCON<3>) is the Comparator Input Switch
CV
REF
C1
V
IN
-
V
IN
+
C1OUT
Two Independent Comparators with Outputs
A
A
CM<2:0> = 011
C2
V
IN
-
V
IN
+
C2OUT
A
A
RF1/AN6/C2OUT*/SEG19
RF2/AN7/C1OUT*/SEG20
* Setting the TRISF<2:1> bits will disable the comparator outputs by configuring the pins as inputs.
C1INA
C1INB
C2INA
C2INB
C1INB
C2INA
C2INB
C1INA
C1INA
C1INB
C2INA
RF2/AN7/C1OUT*/SEG20
RF1/AN6/C2OUT*/SEG19
RF2/AN7/C1OUT*/
SEG20
C1INA
C1INB
C2INA
C2INB
C1INA
C1INB
C2INA
C2INB
C1INA
C1INB
C2INA
C2INB
C1INA
C1INB
C2INA
C2INB
C1INA
C1INB
C2INA
C2INB
C2INB