Microchip Technology MA180025 データシート
2010 Microchip Technology Inc.
DS39933D-page 59
PIC18F87J90 FAMILY
TABLE 5-2:
INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
PIC18F6XJ90
PIC18F8XJ90
---0 0000
---0 0000
---0 uuuu
(1)
TOSH
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
(1)
TOSL
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
(1)
STKPTR
PIC18F6XJ90
PIC18F8XJ90
uu-0 0000
00-0 0000
uu-u uuuu
(1)
PCLATU
PIC18F6XJ90
PIC18F8XJ90
---0 0000
---0 0000
---u uuuu
PCLATH
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
PCL
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
PC + 2
(2)
TBLPTRU
PIC18F6XJ90
PIC18F8XJ90
--00 0000
--00 0000
--uu uuuu
TBLPTRH
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
TABLAT
PIC18F6XJ90
PIC18F8XJ90
0000 0000
0000 0000
uuuu uuuu
PRODH
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
uuuu uuuu
INTCON
PIC18F6XJ90
PIC18F8XJ90
0000 000x
0000 000u
uuuu uuuu
(3)
INTCON2
PIC18F6XJ90
PIC18F8XJ90
1111 1111
1111 1111
uuuu uuuu
(
3)
INTCON3
PIC18F6XJ90
PIC18F8XJ90
1100 0000
1100 0000
uuuu uuuu
(3)
INDF0
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
POSTINC0
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
POSTDEC0
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
PREINC0
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
PLUSW0
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
FSR0H
PIC18F6XJ90
PIC18F8XJ90
---- xxxx
---- uuuu
---- uuuu
FSR0L
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
POSTINC1
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
POSTDEC1
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
PREINC1
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
PLUSW1
PIC18F6XJ90
PIC18F8XJ90
N/A
N/A
N/A
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
4: See Table 5-1 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as ‘0’.