Microchip Technology ARD00330 データシート
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 217
PIC18F87J72 FAMILY
FIGURE 18-13:
I
2
C™ SLAVE MODE TIMING (TRANSMISSION, 10-BIT ADDRESSING)
SDA
SCL
SS
PI
F (
P
IR
1
<
3
>
)
BF
(
S
SPS
TA
T
<
0
>
)
S
1
2
3
4
5
6
7
8
9
1
23
4
5
6
7
8
9
1
2
34
5
7
8
9
P
1
1
1
1
0
A
9A
8
A
7
A
6
A
5
A
4
A
3
A
2A
1A
0
11
1
1
0
A
8
R/W
=
1
ACK
AC
K
R/W
=
0
ACK
R
e
cei
ve F
irst
B
yte of
A
ddre
ss
Cle
a
re
d
in
so
ftwa
re
B
u
s m
a
ster
ter
m
in
at
es
tr
ansfer
A9
6
R
e
cei
ve S
e
con
d
B
yte of A
ddr
ess
C
le
a
red
by har
dw
ar
e w
hen
S
S
P
A
DD is u
p
da
te
d
with
lo
w
byte of
addr
ess
UA (
S
S
PST
A
T
<1
>)
Cl
ock is h
e
ld
lo
w u
n
til
updat
e of S
S
P
A
D
D
has
ta
ken pl
ac
e
UA
is set ind
icating th
at
the
S
S
P
A
DD ne
eds to b
e
up
dated
U
A
is
set
indi
cat
ing
tha
t
S
S
P
A
D
D
ne
eds to
be
upd
ated
C
le
are
d
by ha
rdw
a
re
w
hen
S
S
P
A
D
D
is
up
dated
w
ith
hi
gh
byte o
f addr
ess.
SSP
BUF is
wr
itt
e
n
w
ith
co
ntent
s o
f S
S
P
S
R
D
ummy r
ead o
f S
S
P
B
U
F
to
clear
B
F
flag
R
e
ce
iv
e F
irs
t B
yte of A
ddr
ess
12
3
4
5
7
8
9
D7
D6
D
5
D4
D3
D1
ACK
D2
6
T
ra
n
sm
itt
in
g
Da
ta
Byte
D0
D
ummy r
ead
of S
S
P
B
U
F
to
clear
B
F
flag
Sr
Cle
a
re
d
in
so
ftwa
re
W
rit
e of
S
S
P
B
U
F
in
itia
te
s tr
a
n
sm
it
C
lear
ed i
n
so
ftw
ar
e
C
ompletio
n
of
cl
ea
rs B
F
flag
C
K
P
(
S
S
P
C
ON
1<
4>
)
CK
P is se
t in
so
ftwa
re
CKP
is a
u
to
m
a
tica
lly cle
a
re
d
in
h
a
rd
wa
re
, h
o
ld
in
g
SCL
lo
w
Clo
ck is h
e
ld
lo
w u
n
til
up
d
a
te
o
f S
S
P
A
D
D
ha
s
ta
ke
n pl
ace
dat
a tr
ansmi
ssi
on
Clo
ck is h
e
ld
lo
w u
n
til
CK
P
is set
to ‘
1
’
thi
rd addr
ess
sequ
ence
B
F
flag is cle
a
r
at the
end o
f the