Microchip Technology ARD00330 データシート
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 425
PIC18F87J72 FAMILY
Oscillator Input
Master Clock Frequency Range
Master Clock Frequency Range
MCLK
1
—
16.384
MHz
Power Specifications
Operating Voltage, Analog
Operating Voltage, Analog
SAV
DD
4.5
—
5.5
V
Operating Voltage, Digital
SV
DD
2.7
3.6
5.5
V
Operating Current, Analog
(Note 2)
(Note 2)
AI
DD
—
2
2.8
BOOST<1:0> = 00
—
3.5
5.6
mA
BOOST<1:0> = 11
Operating Current, Digital
DI
DD
—
0.65
0.9
mA
SV
DD
= 5V,
MCLK = 4 MHz
—
0.3
0.4
mA
SV
DD
= 2.7V,
MCLK = 4 MHz
—
1.2
1.6
mA
SV
DD
= 5V,
MCLK = 8.192 MHz
Shutdown Current, Analog
I
DDS
,
A
—
—
1
µA
SAV
DD
pin only (Note 8)
Shutdown Current, Digital
I
DDS
,
D
—
—
1
µA
SV
DD
pin only (Note 8)
TABLE 29-26: DUAL-CHANNEL AFE ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated: SAV
DD
= 4.5 to 5.5V, SV
DD
= 2.7 to 5.5V, -40°C < T
A
<+85°C,
MCLK = 4 MHz, PRESCALE = 1, OSR = 64, GAIN = 1, Dithering Off, V
IN
= -0.5, dBFS = 353 mV
RMS
@ 50/60 Hz
Parameters
Symbol
Min
Typical
Max
Units
Conditions
Note 1:
Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk of damage.
continuously to the part with no risk of damage.
2:
For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00,
VREFEXT = 0, CLKEXT = 0.
VREFEXT = 0, CLKEXT = 0.
3:
This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the maximum
signal range, V
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the maximum
signal range, V
IN
= -0.5 dBFS @ 50/60 Hz = 353 mV
RMS
, mV
REF
= 2.4V.
4:
See Appendix B.3 “Terminology and Formulas” for definitions.
5:
Applies to all gains. Offset error is dependent on PGA gain setting.
6:
This parameter is established by characterization and is not 100% tested.
7:
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz.
AMCLK = MCLK/PRESCALE.
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz.
AMCLK = MCLK/PRESCALE.
8:
For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11,
VREFEXT = 1, CLKEXT = 1.
VREFEXT = 1, CLKEXT = 1.