Microchip Technology DV164136 データシート
PIC18F8722 FAMILY
DS39646C-page 188
© 2008 Microchip Technology Inc.
18.1
ECCP Outputs and Configuration
Each of the Enhanced CCP modules may have up to
four PWM outputs, depending on the selected
operating mode. These outputs, designated PxA
through PxD, are multiplexed with various I/O pins.
Some ECCPx pin assignments are constant, while
others change based on device configuration. For
those pins that do change, the controlling bits are:
four PWM outputs, depending on the selected
operating mode. These outputs, designated PxA
through PxD, are multiplexed with various I/O pins.
Some ECCPx pin assignments are constant, while
others change based on device configuration. For
those pins that do change, the controlling bits are:
• CCP2MX Configuration bit (CONFIG3H<0>)
• ECCPMX Configuration bit (CONFIG3H<1>)
• Program Memory mode (set by Configuration bits,
• ECCPMX Configuration bit (CONFIG3H<1>)
• Program Memory mode (set by Configuration bits,
CONFIG3L<1:0>)
The pin assignments for the Enhanced CCP modules
are summarized in Table 18-1, Table 18-2 and
Table 18-3. To configure the I/O pins as PWM outputs,
the proper PWM mode must be selected by setting the
PxMx and CCPxMx bits (CCPxCON<7:6> and <3:0>,
respectively). The appropriate TRIS direction bits for
the corresponding port pins must also be set as
outputs.
are summarized in Table 18-1, Table 18-2 and
Table 18-3. To configure the I/O pins as PWM outputs,
the proper PWM mode must be selected by setting the
PxMx and CCPxMx bits (CCPxCON<7:6> and <3:0>,
respectively). The appropriate TRIS direction bits for
the corresponding port pins must also be set as
outputs.
18.1.1
USE OF CCP4 AND CCP5 WITH
ECCP1 AND ECCP3
ECCP1 AND ECCP3
Only the ECCP2 module has four dedicated output pins
available for use. Assuming that the I/O ports or other
multiplexed functions on those pins are not needed,
they may be used whenever needed without interfering
with any other CCP module.
available for use. Assuming that the I/O ports or other
multiplexed functions on those pins are not needed,
they may be used whenever needed without interfering
with any other CCP module.
ECCP1 and ECCP3, on the other hand, only have
three dedicated output pins: ECCPx/P3A, PxB and
PxC. Whenever these modules are configured for
Quad PWM mode, the pin used for CCP4 or CCP5
takes priority over the D output pins for ECCP3 and
ECCP1, respectively.
three dedicated output pins: ECCPx/P3A, PxB and
PxC. Whenever these modules are configured for
Quad PWM mode, the pin used for CCP4 or CCP5
takes priority over the D output pins for ECCP3 and
ECCP1, respectively.
18.1.2
ECCP MODULE OUTPUTS,
PROGRAM MEMORY MODES AND
EMB ADDRESS BUS WIDTH
PROGRAM MEMORY MODES AND
EMB ADDRESS BUS WIDTH
For PIC18F8527/8622/8627/8722 devices, the
program memory mode of the device (Section 7.2
“Address and Data Width” and Section 7.4 “Pro-
gram Memory Modes and the External Memory
Bus”) impacts both pin multiplexing and the operation
of the module.
program memory mode of the device (Section 7.2
“Address and Data Width” and Section 7.4 “Pro-
gram Memory Modes and the External Memory
Bus”) impacts both pin multiplexing and the operation
of the module.
The ECCP2 input/output (ECCP2/P2A) can be multi-
plexed to one of three pins. By default, this is RC1 for
all devices; in this case, the default is in effect when
CCP2MX is set and the device is operating in Micro-
controller mode. With PIC18F8527/8622/8627/8722
devices, three other options exist. When CCP2MX is
not set (= 0) and the device is in Microcontroller mode,
ECCP2/P2A is multiplexed to RE7; in all other program
memory modes, it is multiplexed to RB3.
plexed to one of three pins. By default, this is RC1 for
all devices; in this case, the default is in effect when
CCP2MX is set and the device is operating in Micro-
controller mode. With PIC18F8527/8622/8627/8722
devices, three other options exist. When CCP2MX is
not set (= 0) and the device is in Microcontroller mode,
ECCP2/P2A is multiplexed to RE7; in all other program
memory modes, it is multiplexed to RB3.
Another option is for ECCPMX to be set while the
device is operating in one of the three other program
memory modes. In this case, ECCP1 and ECCP3 oper-
ate as compatible (i.e., single output) CCP modules.
The pins used by their other outputs (PxB through PxD)
are available for other multiplexed functions. ECCP2
continues to operate as an Enhanced CCP module
regardless of the program memory mode.
device is operating in one of the three other program
memory modes. In this case, ECCP1 and ECCP3 oper-
ate as compatible (i.e., single output) CCP modules.
The pins used by their other outputs (PxB through PxD)
are available for other multiplexed functions. ECCP2
continues to operate as an Enhanced CCP module
regardless of the program memory mode.
The final option is that the ABW<1:0> Configuration
bits can be used to select 8, 12, 16 or 20-bit EMB
addressing. Pins not assigned to EMB address pins are
available for peripheral or port functions.
bits can be used to select 8, 12, 16 or 20-bit EMB
addressing. Pins not assigned to EMB address pins are
available for peripheral or port functions.