Microchip Technology MA160014 データシート
PIC18(L)F2X/4XK22
DS41412F-page 180
2010-2012 Microchip Technology Inc.
14.1
Capture Mode
The Capture mode function described in this section is
identical for all CCP and ECCP modules available on
this device family.
identical for all CCP and ECCP modules available on
this device family.
Capture mode makes use of the 16-bit Timer
resources, Timer1, Timer3 and Timer5. The timer
resources for each CCP capture function are
independent and are selected using the CCPTMRS0
and CCPTMRS1 registers. When an event occurs on
the CCPx pin, the 16-bit CCPRxH:CCPRxL register
pair captures and stores the 16-bit value of the
TMRxH:TMRxL register pair, respectively. An event is
defined as one of the following and is configured by the
CCPxM<3:0> bits of the CCPxCON register:
resources, Timer1, Timer3 and Timer5. The timer
resources for each CCP capture function are
independent and are selected using the CCPTMRS0
and CCPTMRS1 registers. When an event occurs on
the CCPx pin, the 16-bit CCPRxH:CCPRxL register
pair captures and stores the 16-bit value of the
TMRxH:TMRxL register pair, respectively. An event is
defined as one of the following and is configured by the
CCPxM<3:0> bits of the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the corresponding Interrupt
Request Flag bit CCPxIF of the PIR1, PIR2 or PIR4
register is set. The interrupt flag must be cleared in
software. If another capture occurs before the value in
the CCPRxH:CCPRxL register pair is read, the old
captured value is overwritten by the new captured
value.
Request Flag bit CCPxIF of the PIR1, PIR2 or PIR4
register is set. The interrupt flag must be cleared in
software. If another capture occurs before the value in
the CCPRxH:CCPRxL register pair is read, the old
captured value is overwritten by the new captured
value.
shows a simplified diagram of the Capture
operation.
FIGURE 14-1:
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
OPERATION BLOCK
DIAGRAM
14.1.1
CCP PIN CONFIGURATION
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
as an input by setting the associated TRIS control bit.
Some CCPx outputs are multiplexed on a couple of
pins.
pins.
shows the CCP output pin
multiplexing. Selection of the output pin is determined
by the CCPxMX bits in Configuration register 3H
(CONFIG3H). Refer to
by the CCPxMX bits in Configuration register 3H
(CONFIG3H). Refer to
for more details.
14.1.2
TIMER1 MODE RESOURCE
The 16-bit Timer resource must be running in Timer
mode or Synchronized Counter mode for the CCP
module to use the capture feature. In Asynchronous
Counter mode, the capture operation may not work.
mode or Synchronized Counter mode for the CCP
module to use the capture feature. In Asynchronous
Counter mode, the capture operation may not work.
See
for more information on configuring the 16-bit
Timers.
14.1.3
SOFTWARE INTERRUPT MODE
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIE1, PIE2 or PIE4
register clear to avoid false interrupts. Additionally, the
user should clear the CCPxIF interrupt flag bit of the
PIR1, PIR2 or PIR4 register following any change in
Operating mode.
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIE1, PIE2 or PIE4
register clear to avoid false interrupts. Additionally, the
user should clear the CCPxIF interrupt flag bit of the
PIR1, PIR2 or PIR4 register following any change in
Operating mode.
Note:
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
a write to the port can cause a capture
condition.
CCPRxH
CCPRxL
TMR1/3/5H TMR1/3/5L
Set Flag bit CCPxIF
(PIR1/2/4 register)
Capture
Enable
Enable
CCPxM<3:0>
Prescaler
1, 4, 16
1, 4, 16
and
Edge Detect
pin
CCPx
System Clock (F
OSC
)
TABLE 14-2:
CCP PIN MULTIPLEXING
CCP OUTPUT
CONFIG 3H Control Bit
Bit Value
PIC18(L)F2XK22 I/O pin
PIC18(L)F4XK22 I/O pin
CCP2
CCP2MX
0
RB3
RB3
1
(*)
RC1
RC1
CCP3
CCP3MX
0
(*)
RC6
RE0
1
RB5
RB5
Legend:
*
= Default
Note:
Clocking the 16-bit Timer resource from
the system clock (F
the system clock (F
OSC
) should not be
used in Capture mode. In order for
Capture mode to recognize the trigger
event on the CCPx pin, the Timer resource
must be clocked from the instruction clock
(F
Capture mode to recognize the trigger
event on the CCPx pin, the Timer resource
must be clocked from the instruction clock
(F
OSC
/4) or from an external clock source.