Analog Devices AD9744 Evaluation Board AD9744ACP-PCBZ AD9744ACP-PCBZ データシート
製品コード
AD9744ACP-PCBZ
14-Bit, 210 MSPS TxDAC
®
D/A Converter
Data Sheet
Rev. C
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FEATURES
High performance member of pin-compatible
TxDAC product family
Excellent spurious-free dynamic range performance
SFDR to Nyquist
SFDR to Nyquist
83 dBc at 5 MHz output
80 dBc at 10 MHz output
73 dBc at 20 MHz output
80 dBc at 10 MHz output
73 dBc at 20 MHz output
SNR at 5 MHz output, 125 MSPS: 77 dB
Twos complement or straight binary data format
Differential current outputs: 2 mA to 20 mA
Power dissipation: 135 mW at 3.3 V
Power-down mode: 15 mW at 3.3 V
On-chip 1.2 V reference
CMOS-compatible digital interface
28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages
Edge-triggered latches
Twos complement or straight binary data format
Differential current outputs: 2 mA to 20 mA
Power dissipation: 135 mW at 3.3 V
Power-down mode: 15 mW at 3.3 V
On-chip 1.2 V reference
CMOS-compatible digital interface
28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages
Edge-triggered latches
APPLICATIONS
Wideband communication transmit channel
Direct IFs
Base stations
Wireless local loops
Digital radio links
Direct digital synthesis (DDS)
Instrumentation
Base stations
Wireless local loops
Digital radio links
Direct digital synthesis (DDS)
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
member of the TxDAC series of high performance, low power
CMOS digital-to-analog converters (DACs). The TxDAC family,
consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is
specifically optimized for the transmit signal path of communi-
cation systems. All of the devices share the same interface options,
small outline package, and pinout, providing an upward or
downward component selection path based on performance,
resolution, and cost. The
CMOS digital-to-analog converters (DACs). The TxDAC family,
consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is
specifically optimized for the transmit signal path of communi-
cation systems. All of the devices share the same interface options,
small outline package, and pinout, providing an upward or
downward component selection path based on performance,
resolution, and cost. The
offers exceptional ac and dc
’s low power dissipation makes it well suited for
portable and low power applications. Its power dissipation can
be further reduced to a mere 60 mW with a slight degradation
in performance by lowering the full-scale current output. Also,
a power-down mode reduces the standby power dissipation to
approximately 15 mW. A segmented current source architecture
is combined with a proprietary switching technique to reduce
be further reduced to a mere 60 mW with a slight degradation
in performance by lowering the full-scale current output. Also,
a power-down mode reduces the standby power dissipation to
approximately 15 mW. A segmented current source architecture
is combined with a proprietary switching technique to reduce
spurious components and enhance dynamic performance.
Edge-triggered input latches and a 1.2 V temperature compensated
band gap reference have been integrated to provide a complete
monolithic DAC solution. The digital inputs support 3 V
band gap reference have been integrated to provide a complete
monolithic DAC solution. The digital inputs support 3 V
CMOS logic families.
PRODUCT HIGHLIGHTS
1. The
family, which offers excellent INL and DNL performance.
2. Data input supports twos complement or straight binary data
coding.
3. High speed, single-ended CMOS clock input supports
210 MSPS conversion rate.
4. Low power: Complete CMOS DAC function operates on
135 mW from a 2.7 V to 3.6 V single supply. The DAC full-
scale current can be reduced for lower power operation, and a
sleep mode is provided for low power idle periods.
scale current can be reduced for lower power operation, and a
sleep mode is provided for low power idle periods.
5. On-chip voltage reference: The
includes a 1.2 V
temperature compensated band gap voltage reference.
6. Industry-standard 28-lead SOIC, 28-lead TSSOP, and 32-lead
LFCSP packages.
1
Protected by U.S. Patent Numbers 5568145, 5689257, and 5703519.
1.2V REF
REFLO
3.3V
R
SET
0.1
µF
CLOCK
SLEEP
02913-001
REFIO
FS ADJ
DVDD
DCOM
CLOCK
DIGITAL DATA INPUTS (DB13–DB0)
150pF
3.3V
AVDD
ACOM
AD9744
CURRENT
SOURCE
ARRAY
IOUTA
IOUTB
MODE
LSB
SWITCHES
SEGMENTED
SWITCHES
LATCHES