Analog Devices ADP5062CP Evaluation Board ADP5062CP-EVALZ ADP5062CP-EVALZ データシート
製品コード
ADP5062CP-EVALZ
Data Sheet
ADP5062
Rev. B | Page 17 of 44
Figure 29. Block Diagram
6
7
9
10
ISO_S1
ISO_S2
ISO_S3
VIN1
VIN2
11
14
ISO_B2
18
THR
+
–
0.5V
NTC CURRENT
CONTROL
COLD
COOL
WARM
HOT
NT
C
TRICKLE
CURRENT
SOURCE
19
BATTERY
DETECTION
SINK
4
BAT_SNS
BATTERY DETECTION
BATTERY:
OPEN
SHORT
OPEN
SHORT
TRICKLE
WEAK
CV MODE
RECHARGE
RECHARGE
CHARGE CONTROL
EOC
TO SYSTEM
LOAD
+
–
6.85V
3.9V
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
VIN
OVERVOLTAGE
VIN LIMIT
BATTERY
ISOLATION FET
VIN GOOD
BATTERY OVERVOLTAGE
1
17
SCL
SDA
TO USB VBUS
OR WALL
ADAPTER
20
AGND
5
3
2
DIG_IO1
DIG_IO2
DIG_IO3
16
SYS_EN
3MHz OSC
SINGLE
CELL
Li-Ion
T
S
D
14
0°
C
SYS_EN OUTPUT
LOGIC
THERMAL CONTROL
8
VIN3
CBP
ISO_B3
13
12
15
ILED
ILED OUTPUT
LOGIC
HIGH VOLTAGE
BLOCKING
LDO FET
+
–
LDO FET
CONTROL
3.4V
I
2
C INTERFACE
AND
CONTROL LOGIC
VIN – 150mV
ISO_B1
1.9V
W
ARNI
N
G
130
°C
IS
O
T
HE
RM
AL
1
1
5
°C
T
S
D DO
W
N
1
1
0
°C
1
080
6-
02
9