Atmel Evaluation Board using the SAM7SE Microcontroller AT91SAM7SE-EK AT91SAM7SE-EK データシート

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AT91SAM7SE-EK
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6295A–ATARM–27-Mar-07
Application Note
eight times. This is necessary to clear any interrupt which may have been pushed on the internal
hardware stack of the AIC during a previous execution of the program.
3.2.3.3
Configuring an Interrupt
Configuring an interrupt source requires five steps:
• Disable the interrupt in case it was enabled
• Configure the interrupt Source Mode Register
• Configure the interrupt Source Vector Register
• Enable the interrupt at the peripheral level
• Enable the interrupt at AIC level
The first step is to disable the interrupt source. An interrupt triggering at the same time that its
mode or vector registers are read may result in unpredictable behavior of the system. The Inter-
rupt Disable Command Register (IDCR) of the AIC must be written with the interrupt source ID to
mask it. Please refer to the corresponding datasheet for a list of peripheral IDs.
There are two parameters to set in the Source Mode Register: the interrupt priority and trigger
mode. The former is completely up to the programmer; the interrupt can have a priority between
0 (lowest) and 7 (highest). Internal interrupts (i.e., coming from peripherals) must always be con-
figured as level-sensitive; external interrupt (i.e., IRQ[0..3], FIQ) shall be setup depending on
how they have been wired to the chip.
The Source Vector Register contains the address of the handler function for the interrupt. A
function pointer must be cast as an unsigned long value in C to avoid generating a warning
when setting SVR.
Finally, the interrupt source can be enabled, both on the peripheral (in a mode register usually)
and in the Interrupt Enable Command Register (IECR) of the AIC. At this point, the interrupt is
fully configured and operational.
3.2.4
Using the Timer Counter
3.2.4.1
Purpose
Timer Counters on AT91SAM chips can perform several functions, e.g., frequency measure-
ment, pulse generation, delay timing, Pulse Width Modulation (PWM), etc.
In this example, a single Timer Counter channel is going to provide a fixed-period delay. An
interrupt is generated each time the timer expires, toggling the associated LED on or off. This
makes the LED blink at a fixed rate.
3.2.4.2
Initialization
In order to reduce power consumption, most peripherals are not clocked by default. Writing the
ID of a peripheral in the Peripheral Clock Enable Register (PCER) of the Power Management
Controller (PMC) activates its clock. This is the first step when initializing the Timer Counter.
The TC is then disabled, in case it has been turned on by a previous execution of the program.
This is done by setting the CLKDIS bit in the corresponding Channel Control Register (CCR). In
the example, timer channel 0 is used.
The next step is to configure the Channel Mode Register (CMR). TC channels can operate in
two different modes. The first one, which is referred to as the Capture mode, is normally used for
performing measurements on input signals. The second one, the Waveform mode, enables the