Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK データシート

ARM DDI0198D

3-23

For load and store instructions that can involve the transfer of more than one word 
(LDM/STM, LDRD, STRD, and STC/LDC), the value written into the FAR register 
depends on the type of access, and for external aborts, on whether or not the access 
crosses a 1KB boundary. Table 3-10 shows the FAR values for multi-word transfers.

To enable code to be easily ported to ARM architecture v4 or v5 MMUs, or to future 
architectures, it is recommended that no reliance is made on external abort behavior.

The instruction FSR is intended for debugging purposes only. Code that is intended to 
be ported to other ARM architecture v4 or v5 MMUs must not use the instruction FSR.

Alignment

MVA of first aborted address in transfer.

External abort on translation

MVA of first aborted address in transfer.

Translation

MVA of first aborted address in transfer.

Domain

MVA of first aborted address in transfer.

Permission

MVA of first aborted address in transfer.

External abort for noncached reads, or 
nonbuffered writes.

MVA of last address before 1KB boundary if any 
word of the transfer before 1KB boundary is 
externally aborted. 
MVA of last address in transfer if the first 
externally aborted word is after 1KB boundary.