Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK データシート

867

SAM9G25 [DATASHEET]

11032C–ATARM–25-Jan-13

The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 10-bit digital data requires
Tracking Clock cycles as defined in the field TRACKTIM of the 

 and Transfer Clock

cycles as defined in the field TRANSFER of the same register. The ADC Clock frequency is selected in the PRESCAL
field of the Mode Register (ADC_MR). The tracking phase starts during the conversion of the previous channel. If the
tracking time is longer than the conversion time, the tracking phase is extended to the end of the previous conversion.

The ADC clock range is between MCK/2, if PRESCAL is 0, and MCK/512, if PRESCAL is set to 255 (0xFF). PRESCAL
must be programmed in order to provide an ADC clock frequency according to the parameters given in the product
Electrical Characteristics section.

The conversion is performed on a full range between 0V and the reference voltage pin ADVREF. Analog inputs between
these voltages convert to values based on a linear conversion.

The ADC supports 8-bit or 10-bit resolutions. The 8-bit selection is performed by setting the LOWRES bit in the ADC
Mode Register (ADC_MR). By default, after a reset, the resolution is the highest and the DATA field in the data registers
is fully used. By setting the LOWRES bit, the ADC switches to the lowest resolution and the conversion results can be
read in the lowest significant bits of the data registers. The two highest bits of the DATA field in the corresponding
ADC_CDR register and of the LDATA field in the ADC_LCDR register read 0. 

ADCClock

LCDR

ADC_ON

ADC_

S

EL

DRDY

ADC_

S

t

a

rt

CH0

CH1

CH0

CH2

CH1

S

t

a

rt Up Time

(

a

nd tr

a

cking of CH0)

Conver

s

ion of CH0

Conver

s

ion of CH1

Tr

a

cking of CH1

Tr

a

cking of CH2

ADC_eoc

Trigger event

(H

a

rd or 

S

oft)

An

a

log cell IO

s