Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK データシート

937

SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

CAN_ECR

0xF8000020 (0), 0xF8004020 (1)

Read-only 

When a receiver detects an error, REC will be increased by one, except when the detected error is a BIT ERROR while sending 
an ACTIVE ERROR FLAG or an OVERLOAD FLAG.

When a receiver detects a dominant bit as the first bit after sending an ERROR FLAG, REC is increased by 8.

When a receiver detects a BIT ERROR while sending an ACTIVE ERROR FLAG, REC is increased by 8.

Any node tolerates up to 7 consecutive dominant bits after sending an ACTIVE ERROR FLAG, PASSIVE ERROR FLAG or 
OVERLOAD FLAG. After detecting the 14th consecutive dominant bit (in case of an ACTIVE ERROR FLAG or an OVERLOAD 
FLAG) or after detecting the 8th consecutive dominant bit following a PASSIVE ERROR FLAG, and after each sequence of addi-
tional eight consecutive dominant bits, each receiver increases its REC by 8.

After successful reception of a message, REC is decreased by 1 if it was between 1 and 127. If REC was 0, it stays 0, and if it was 
greater than 127, then it is set to a value between 119 and 127.

When a transmitter sends an ERROR FLAG, TEC is increased by 8 except when:

– The transmitter is error passive and detects an ACKNOWLEDGMENT ERROR because of not detecting a 

dominant ACK and does not detect a dominant bit while sending its PASSIVE ERROR FLAG.

– The transmitter sends an ERROR FLAG because a STUFF ERROR occurred during arbitration and should 

have been recessive and has been sent as recessive but monitored as dominant.

When a transmitter detects a BIT ERROR while sending an ACTIVE ERROR FLAG or an OVERLOAD FLAG, the TEC will be 
increased by 8.

Any node tolerates up to 7 consecutive dominant bits after sending an ACTIVE ERROR FLAG, PASSIVE ERROR FLAG or 
OVERLOAD FLAG. After detecting the 14th consecutive dominant bit (in case of an ACTIVE ERROR FLAG or an OVERLOAD 
FLAG) or after detecting the 8th consecutive dominant bit following a PASSIVE ERROR FLAG, and after each sequence of addi-
tional eight consecutive dominant bits every transmitter increases its TEC by 8.

After a successful transmission the TEC is decreased by 1 unless it was already 0.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

TEC

23

22

21

20

19

18

17

16

TEC

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

REC