Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート

製品コード
AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
15.5.1
Periodic  Interval  Timer  Mode  Register
Name:
PIT_MR
Address:
0xFFFFFD30
Access:
 Read/Write
• PIV:  Periodic  Interval  Value
Defines the value compared with the primary 20-bit counter of the Periodic Interval Timer (CPIV). The period is equal to
(PIV + 1).
• PITEN:  Period  Interval  Timer  Enabled
0 = The Periodic Interval Timer is disabled when the PIV value is reached.
1 = The Periodic Interval Timer is enabled.
• PITIEN:  Periodic  Interval  Timer  Interrupt  Enable
0 = The bit PITS in PIT_SR has no effect on interrupt.
1 = The bit PITS in PIT_SR asserts interrupt.
31
30
29
28
27
26
25
24
PITIEN
PITEN
23
22
21
20
19
18
17
16
PIV
15
14
13
12
11
10
9
8
PIV
7
6
5
4
3
2
1
0
PIV