Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート

製品コード
AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
around on the data rate is dependent on the error rate observed in the application but can be such that streaming
data at high rates becomes impractical.
50.1.10
USB  High  Speed  Host  Port  (UHPHS)  and  Device  Port  (UDPHS)
50.1.10.1
UHPHS/UDPHS: USB does not start after power-up
The USB may not start properly at first use after power-up. 
Booting out of the internal ROM fixes this issue because the workaround below is applied in the ROM Code.
Problem  Fix/Workaround
There are two possible workarounds.
1.
Apply a hardware reset (NRST) after power-up.
Or
2.
Activate the PLLUTMI twice, following the procedure below:
– a- Start The UTMI PLL an wait for the PLL lock bit
– b- Disable the UTMI PLL and wait 10 μseconds minimum
– c- Restart the UTMIPLL and wait for the PLL Lock bit
Warning: When booting out of the internal ROM, this workaround is not implemented and therefore SAMBA will not
be functional.
Below is a possible implementation of the workaround:
/* First enable the UTMI PLL */
AT91C_BASE_PMC->CKGR_UCKR |= (AT91C_CKGR_UCKR_PLLCOUNT & (0x3 << 20)) |
AT91C_CKGR_UCKR_UPLLEN;
tmp =0;
while (((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_SR_LOCKU) == 0) && (tmp++ < DELAY));
/* Disable the PLLUTMI and wait 10µs min*/
AT91C_BASE_PMC->CKGR_UCKR &= ~AT91C_CKGR_UCKR_UPLLEN;
tmp = 0;
while(tmp++ < DELAY2); // DELAY2 must be defined to fit the 10µs min;
/* Re- enable the UTMI PLL and wait for the PLL lock status*/
AT91C_BASE_PMC->CKGR_UCKR |= (AT91C_CKGR_UCKR_PLLCOUNT & (0x3 << 20)) |
AT91C_CKGR_UCKR_UPLLEN;
tmp =0;
while (((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_SR_LOCKU) == 0) && (tmp++ < DELAY));