Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート

製品コード
AT91SAM9M10-G45-EK
ページ / 1361
 598
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
33.7
Functional  Description
This chapter contains the functional description of the following: SSC Functional Block, Clock Management, Data
format, Start, Transmitter, Receiver and Frame Sync.
The receiver and transmitter operate separately. However, they can work synchronously by programming the
receiver to use the transmit clock and/or to start a data transfer when transmission starts. Alternatively, this can be
done by programming the transmitter to use the receive clock and/or to start a data transfer when reception starts.
The transmitter and the receiver can be programmed to operate with the clock signals provided on either the TK or
RK pins. This allows the SSC to support many slave-mode data transfers. The maximum clock speed allowed on
the TK and RK pins is the master clock divided by 2. 
Figure  33-4.
SSC Functional Block Diagram
Interrupt Control
AIC
User
Interface
APB
MCK
Receive Clock
Controller
TX Clock
RK Input
Clock Output
Controller
Frame Sync
Controller
Transmit Clock
Controller
Transmit Shift Register
Start
Selector
Start
Selector
Transmit Sync
Holding Register
Transmit Holding
Register
RX clock
TX clock
TK Input
RD
RF
RK
Clock Output
Controller
Frame Sync
Controller
Receive Shift Register
Receive Sync
Holding Register
Receive Holding
            Register
TD
TF
TK
RX Clock
Receiver
Transmitter
Data
Controller
TXEN
Data
Controller
RF
TF
RX Start
RXEN
RC0R
TX Start
Clock
Divider
RX Start
TX Start