Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート

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SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

Note:

1. STTDLY is set to 0. In this example, SSC_THR is loaded twice. FSDEN value has no effect on the transmission. 

SyncData cannot be output in continuous mode.

Receive Frame Format in Continuous Mode 

Note:

1. STTDLY is set to 0.

The receiver can be programmed to receive transmissions from the transmitter. This is done by setting the Loop
Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF is connected to TF and RK is connected
to TK.

Most bits in SSC_SR have a corresponding bit in interrupt management registers.

The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is controlled by writ-
ing SSC_IER (Interrupt Enable Register) and SSC_IDR (Interrupt Disable Register) These registers enable and
disable, respectively, the corresponding interrupt by setting and clearing the corresponding bit in SSC_IMR (Inter-
rupt Mask Register), which controls the generation of interrupts by asserting the SSC interrupt line connected to
the AIC.

Interrupt Block Diagram

Data

DATLEN

Data

DATLEN

Start = Enable Receiver

To SSC_RHR

To SSC_RHR

RD

SSC_IMR

PDC

Interrupt 

Control

SSC Interrupt

Set

RXRDY

OVRUN

RXSYNC

Receiver

Transmitter

TXRDY

TXEMPTY

TXSYNC

TXBUFE

ENDTX

RXBUFF

ENDRX

Clear

SSC_IER

SSC_IDR