Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK データシート
製品コード
AT91SAM9M10-G45-EK
703
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
35.13.6
HSMCI Command Register
Name:
HSMCI_CMDR
Addresses:
0xFFF80014 (0), 0xFFFD0014 (1)
Access:
Write-only
This register is write-protected while CMDRDY is 0 in HSMCI_SR. If an Interrupt command is sent, this register is only
writeable by an interrupt response (field SPCMD). This means that the current command execution cannot be interrupted
or modified.
writeable by an interrupt response (field SPCMD). This means that the current command execution cannot be interrupted
or modified.
• CMDNB: Command Number
• RSPTYP: Response Type
• SPCMD: Special Command
31
30
29
28
27
26
25
24
–
–
–
–
BOOT_ACK
ATACS
IOSPCMD
23
22
21
20
19
18
17
16
–
–
TRTYP
TRDIR
TRCMD
15
14
13
12
11
10
9
8
–
–
–
MAXLAT
OPDCMD
SPCMD
7
6
5
4
3
2
1
0
RSPTYP
CMDNB
RSP
Response Type
0
0
No response.
0
1
48-bit response.
1
0
136-bit response.
1
1
R1b response type
SPCMD
Command
0
0
0
Not a special CMD.
0
0
1
Initialization CMD:
74 clock cycles for initialization sequence.
0
1
0
Synchronized CMD:
Wait for the end of the current data block transfer before sending the
pending command.
pending command.
0
1
1
CE-ATA Completion Signal disable Command.
The host cancels the ability for the device to return a command
completion signal on the command line.
completion signal on the command line.
1
0
0
Interrupt command:
Corresponds to the Interrupt Mode (CMD40).