Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK データシート
製品コード
AT91SAM9G25-EK
1079
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
45.6.26 EMAC Statistic Registers
These registers reset to zero on a read and stick at all ones when they count to their maximum value. They should be read fre-
quently enough to prevent loss of data. The receive statistics registers are only incremented when the receive enable bit is set in
the network control register. To write to these registers, bit 7 must be set in the network control register. The statistics register
block contains the following registers.
quently enough to prevent loss of data. The receive statistics registers are only incremented when the receive enable bit is set in
the network control register. To write to these registers, bit 7 must be set in the network control register. The statistics register
block contains the following registers.