Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK データシート

478

SAM9G25 [DATASHEET]

11032D–ATARM–10-Mar-2014

DDRSDRC_HS

0xFFFFE82C

Read-write

See 

This register can only be written if the bit WPEN is cleared in 

.

0 = anticip read access is enabled.

1 = anticip read access is disabled (default).

DIS_ANTICIP_READ allows DDR2 read access optimization with multi-port.

As this feature is based on the “bank open policy”, the software must map different buffers in different DDR2 banks to take advan-
tage of that feature.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

–

DIS_ANTICIP_RE

AD

–

–