Atmel Evaluation Kit for ATxmega32E5, 8/16-bit AVR XMEGA Microcontroller Atmel ATXMEGAE5-XPLD ATXMEGAE5-XPLD データシート
製品コード
ATXMEGAE5-XPLD
53
XMEGA E5 [DATASHEET]
Atmel-8153H–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–07/2014
29.
DAC – Digital to Analog Converter
29.1
Features
z
One Digital to Analog Converter (DAC)
z
12-bit resolution
z
Two independent, continuous-drive output channels
z
Up to 1 million samples per second conversion rate per DAC channel
z
Built-in calibration that removes:
z
Offset error
z
Gain error
z
Multiple conversion trigger sources
z
On new available data
z
Events from the event system
z
Drive capabilities and support for
z
Resistive loads
z
Capacitive loads
z
Combined resistive and capacitive loads
z
Internal and external reference options
z
DAC output available as input to analog comparator and ADC
z
Low-power mode, with reduced drive strength
z
Optional EDMA transfer of data
29.2
Overview
The digital-to-analog converter (DAC) converts digital values to voltages. The DAC has two channels, each with 12-bit
resolution, and is capable of converting up to one million samples per second (Msps) on each channel. The built-in
calibration system can remove offset and gain error when loaded with calibration values from software.
resolution, and is capable of converting up to one million samples per second (Msps) on each channel. The built-in
calibration system can remove offset and gain error when loaded with calibration values from software.
Figure 29-1. DAC overview.
A DAC conversion is automatically started when new data to be converted are available. Events from the event system
can also be used to trigger a conversion, and this enables synchronized and timed conversions between the DAC and
other peripherals, such as a timer/counter. The EDMA controller can be used to transfer data to the DAC.
can also be used to trigger a conversion, and this enables synchronized and timed conversions between the DAC and
other peripherals, such as a timer/counter. The EDMA controller can be used to transfer data to the DAC.
DAC0
DAC1
CTRLA
CH1DATA
CH0DATA
Trigger
Trigger
Internal Output
enable
enable
Enable
Internal 1.00V
AREFA
Reference
selection
AVCC
Output
Driver
Driver
Output
Driver
Driver
D
A
T
A
A
T
A
Int.
driver
driver
D
A
T
A
A
T
A
CTRLB
EDMA req
(Data Empty)
EDMA req
(Data Empty)
Select
12
12
Select
Enable
To
AC/ADC
AC/ADC
AREFD