Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD データシート

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SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
Notes: 1. Occurs on an access to an XN region even if the processor does not include an MPU or the MPU is disabled.
2. Attempt to use an instruction set other than the Thumb instruction set, or return to a non load/store-multiple instruction 
with ICI continuation.
Fault Escalation and Hard Faults
All faults exceptions except for hard fault have configurable exception priority, see 
.
The software can disable the execution of the handlers for these faults, see 
.Usually, the exception priority, together with the values of the exception mask registers, determines whether the
processor enters the fault handler, and whether a fault handler can preempt another fault handler, as described in
.
In some situations, a fault with configurable priority is treated as a hard fault. This is called priority escalation, and the
fault is described as escalated to hard fault. Escalation to hard fault occurs when:
A fault handler causes the same kind of fault as the one it is servicing. This escalation to hard fault occurs because 
a fault handler cannot preempt itself; it must have the same priority as the current priority level.
A fault handler causes a fault with the same or lower priority as the fault it is servicing. This is because the handler 
for the new fault cannot preempt the currently executing fault handler.
An exception handler causes a fault for which the priority is the same as or lower than the currently executing 
exception.
A fault occurs and the handler for that fault is not enabled.
If a bus fault occurs during a stack push when entering a bus fault handler, the bus fault does not escalate to a hard fault.
This means that if a corrupted stack causes a fault, the fault handler executes even though the stack push for the handler
failed. The fault handler operates but the stack contents are corrupted. 
Note:
Only Reset and NMI can preempt the fixed priority hard fault. A hard fault can preempt any exception other than 
Reset, NMI, or another hard fault.
Fault Status Registers and Fault Address Registers
The fault status registers indicate the cause of a fault. For bus faults and memory management faults, the fault address
register indicates the address accessed by the operation that caused the fault, as shown in 
Attempt to access a coprocessor
Usage fault
NOCP
Undefined instruction
UNDEFINSTR
INVSTATE
Invalid EXC_RETURN value
INVPC
Illegal unaligned load or store
UNALIGNED
Divide By 0
DIVBYZERO
Table 12-11. Faults (Continued)
Fault
Handler
Bit Name
Fault Status Register
Table 12-12. Fault Status and Fault Address Registers 
Handler
Status Register 
Name
Address 
Register Name
Register Description
Hard fault
SCB_HFSR
-