Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD データシート
製品コード
ATSAM4S-XPLD
891
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
38.7.10 PWM Sync Channels Update Control Register
Name:
PWM_SCUC
Address:
0x40020028
Access:
Read-write
• UPDULOCK: Synchronous Channels Update Unlock
0 = No effect
, writing the UPDULOCK bit to “1” triggers
the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning of the next
PWM period. If the field UPDM is set to “1” or “2”, writing the UPDULOCK bit to “1” triggers only the update of the period value and
of the dead-time values of synchronous channels.
PWM period. If the field UPDM is set to “1” or “2”, writing the UPDULOCK bit to “1” triggers only the update of the period value and
of the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
UPDULOCK