Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート
製品コード
AT32UC3A3-XPLD
351
32072H–AVR32–10/2012
AT32UC3A3
19.12.2
Channel x Destination Address Register
Name: DARx
Access Type: Read/Write
Offset:
0x008 + [x * 0x58]
Reset Value:
0x00000000
• DADD: Destination Address of DMA transfer
The starting System Bus destination address is programmed by software before the DMA channel is enabled or by a LLI
update before the start of the DMA transfer. As the DMA transfer is in progress, this register is updated to reflect the desti-
nation address of the current System Bus transfer.
update before the start of the DMA transfer. As the DMA transfer is in progress, this register is updated to reflect the desti-
nation address of the current System Bus transfer.
Updated after each destination System Bus transfer. The DINC field in the CTLx register determines whether the address
increments, decrements or is left unchanged on every destination System Bus transfer throughout the block transfer.
increments, decrements or is left unchanged on every destination System Bus transfer throughout the block transfer.
31
30
29
28
27
26
25
24
DADD[31:24]
23
22
21
20
19
18
17
16
DADD[23:16]
15
14
13
12
11
10
9
8
DADD[15:8]
7
6
5
4
3
2
1
0
DADD[7:0]