Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート

製品コード
AT32UC3A3-XPLD
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32072H–AVR32–10/2012
AT32UC3A3
19.12.20 Last Source Transaction Request Register
Name: LstSrcReg
Access Type: Read/write
Offset:
0x388
Reset Value: 
0x0000000
A bit is assigned for each channel in this register. LstSrcReg[n] is ignored when software handshaking is not enabled for
the source of channel n.
A channel LSTSRC bit is written only if the corresponding channel write enable bit in the LSTSRC_WE field is asserted on
the same System Bus write transfer.
• LSTSRC_WE[11:8]: Source Last Transaction request write enable
0 = Write disabled
1 = Write enabled
• LSTSRC[3:0]: Source Last Transaction request
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
LSTSRC_W
E3
LSTSRC_W
E2
LSTSRC_W
E1
LSTSRC_W
E0
7
6
5
4
3
2
1
0
-
-
-
-
LSTSRC3
LSTSRC2
LSTSRC1
LSTSRC0