Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート

32072H–AVR32–10/2012

Note:

1. The reset values for these registers are device specific. Please refer to the Module Configuration section at the end of this 

chapter.

TWIS Register Memory Map

0x00

Control Register

CR

Read/Write

0x00000000

0x04

NBYTES Register

NBYTES

Read/Write

0x00000000

0x08

Timing Register

TR

Read/Write

0x00000000

0x0C

Receive Holding Register

RHR

Read-only

0x00000000

0x10

Transmit Holding Register

THR

Write-only

0x00000000

0x14

Packet Error Check Register

PECR

Read-only

0x00000000

0x18

Status Register

SR

Read-only

0x00000002

0x1C

Interrupt Enable Register

IER

Write-only

0x00000000

0x20

Interrupt Disable Register

IDR

Write-only

0x00000000

0x24

Interrupt Mask Register

IMR

Read-only

0x00000000

0x28

Status Clear Register

SCR

Write-only

0x00000000

0x2C

Parameter Register

PR

Read-only

-

0x30

Version Register

VR

Read-only

-