Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート
製品コード
AT32UC3A3-XPLD
722
32072H–AVR32–10/2012
AT32UC3A3
27.8.3.5
Host Global Interrupt Enable Register
Register Name:
UHINTE
Access Type:
Read-Only
Offset:
0x0410
Reset Value:
0x00000000
• DMAnINTE: DMA Channel n Interrupt Enable
This bit is set when the DMAnINTES bit is written to one. This will enable the DMA Channel n Interrupt (DMAnINT).
This bit is cleared when the DMAnINTEC bit is written to one. This will disable the DMA Channel n Interrupt (DMAnINT).
• PnINTE: Pipe n Interrupt Enable
This bit is set when the PnINTES bit is written to one. This will enable the Pipe n Interrupt (PnINT).
This bit is cleared when the PnINTEC bit is written to one. This will disable the Pipe n Interrupt (PnINT).
• HWUPIE: Host Wake-Up Interrupt Enable
This bit is set when the HWUPIES bit is written to one. This will enable the Host Wake-up Interrupt (HWUPI).
This bit is cleared when the HWUPIEC bit is written to one. This will disable the Host Wake-up Interrupt (HWUPI).
• HSOFIE: Host Start of Frame Interrupt Enable
This bit is set when the HSOFIES bit is written to one. This will enable the Host Start of Frame interrupt (HSOFI).
This bit is cleared when the HSOFIEC bit is written to one. This will disable the Host Start of Frame interrupt (HSOFI).
• RXRSMIE: Upstream Resume Received Interrupt Enable
This bit is set when the RXRSMIES bit is written to one. This will enable the Upstream Resume Received interrupt (RXRSMI).
This bit is cleared when the RXRSMIEC bit is written to one. This will disable the Downstream Resume interrupt (RXRSMI).
• RSMEDIE: Downstream Resume Sent Interrupt Enable
This bit is set when the RSMEDIES bit is written to one. This will enable the Downstream Resume interrupt (RSMEDI).
This bit is cleared when the RSMEDIEC bit is written to one. This will disable the Downstream Resume interrupt (RSMEDI).
• RSTIE: USB Reset Sent Interrupt Enable
This bit is set when the RSTIES bit is written to one. This will enable the USB Reset Sent interrupt (RSTI).
This bit is cleared when the RSTIEC bit is written to one. This will disable the USB Reset Sent interrupt (RSTI).
• DDISCIE: Device Disconnection Interrupt Enable
This bit is set when the DDISCIES bit is written to one. This will enable the Device Disconnection interrupt (DDISCI).
This bit is cleared when the DDISCIEC bit is written to one. This will disable the Device Disconnection interrupt (DDISCI).
• DCONNIE: Device Connection Interrupt Enable
This bit is set when the DCONNIES bit is written to one. This will enable the Device Connection interrupt (DCONNI).
This bit is cleared when the DCONNIEC bit is written to one. This will disable the Device Connection interrupt (DCONNI).
31
30
29
28
27
26
25
24
DMA7INTE
DMA6INTE
DMA5INTE
DMA4INTE
DMA3INTE
DMA2INTE
DMA1INTE
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
P7INTE
P6INTE
P5INTE
P4INTE
P3INTE
P2INTE
P1INTE
P0INTE
7
6
5
4
3
2
1
0
-
HWUPIE
HSOFIE
RXRSMIE
RSMEDIE
RSTIE
DDISCIE
DCONNIE