Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート
製品コード
AT32UC3A3-XPLD
769
32072H–AVR32–10/2012
AT32UC3A3
28.7.2
Channel Mode Register: Capture Mode
Name:
CMR
Access Type:
Read/Write
Offset:
0x04 + n * 0x40
Reset Value:
0x00000000
• LDRB: RB Loading Selection
• LDRA: RA Loading Selection
• WAVE
1: Capture mode is disabled (Waveform mode is enabled).
0: Capture mode is enabled.
• CPCTRG: RC Compare Trigger Enable
1: RC Compare resets the counter and starts the counter clock.
0: RC Compare has no effect on the counter and its clock.
• ABETRG: TIOA or TIOB External Trigger Selection
1: TIOA is used as an external trigger.
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
LDRB
LDRA
15
14
13
12
11
10
9
8
WAVE
CPCTRG
-
-
-
ABETRG
ETRGEDG
7
6
5
4
3
2
1
0
LDBDIS
LDBSTOP
BURST
CLKI
TCCLKS
LDRB
Edge
0
none
1
rising edge of TIOA
2
falling edge of TIOA
3
each edge of TIOA
LDRA
Edge
0
none
1
rising edge of TIOA
2
falling edge of TIOA
3
each edge of TIOA