Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD データシート

製品コード
AT32UC3A3-XPLD
ページ / 1021
905
32072H–AVR32–10/2012
AT32UC3A3
33.5.6
Interrupt Status Register
Name: ISR
Access Type: Read-only
Offset:
0x1C
Reset Value:
0x0000001E 
• URAT: Unspecified Register Access Type:
Only the last Unspecified Register Access Type is available through the URAT field.
This field is reset to 0 when SWRST bit in the Control Register is written to one.
• URAD: Unspecified Register Access Detection Status
This bit is set when at least one unspecified register access has been detected since the last software reset.
This bit is cleared when SWRST bit in the Control Register is set to one.
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
URAT
-
-
-
URAD
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
DATRDY
URAT
Description
0
The IDATAnR register during the data processing in DMA mode.
1
The ODATAnR register read during the data processing.
2
The MR register written during the data processing.
3
The ODATAnR register read during the sub-keys generation.
4
The MR register written during the sub-keys generation.
5
Write-only register read access.
Others
Reserved