Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 データシート
![Atmel](https://files.manualsbrain.com/attachments/0369829915bda09f9c2e00fb805a7753579683b5/common/fit/150/50/8d2bf08978ec3e5bc63f4343ac5e91ce8d0e40045619fa520d910d64af8f/brand_logo.png)
製品コード
ATEVK1105
328
AT32UC3A
Figure 26-31.
T = 0 Protocol without Parity Error
Figure 26-32.
T = 0 Protocol with Parity Error
26.7.5.3
Receive Error Counter
The USART receiver also records the total number of errors. This can be read in the Number of
Error (NER) register. The NB_ERRORS field can record up to 255 errors. Reading NER auto-
matically clears the NB_ERRORS field.
26.7.5.4
Receive NACK Inhibit
The USART can also be configured to inhibit an error. This can be achieved by setting the
INACK bit in the Mode Register (MR). If INACK is at 1, no error signal is driven on the I/O line
even if a parity bit is detected, but the INACK bit is set in the Status Register (SR). The INACK
bit can be cleared by writing the Control Register (CR) with the RSTNACK bit at 1.
Moreover, if INACK is set, the erroneous received character is stored in the Receive Holding
Moreover, if INACK is set, the erroneous received character is stored in the Receive Holding
Register, as if no error occurred. However, the RXRDY bit does not raise.
26.7.5.5
Transmit Character Repetition
When the USART is transmitting a character and gets a NACK, it can automatically repeat the
character before moving on to the next one. Repetition is enabled by writing the
MAX_ITERATION field in the Mode Register (MR) at a value higher than 0. Each character can
be transmitted up to eight times; the first transmission plus seven repetitions.
If MAX_ITERATION does not equal zero, the USART repeats the character as many times as
If MAX_ITERATION does not equal zero, the USART repeats the character as many times as
the value loaded in MAX_ITERATION.
When the USART repetition number reaches MAX_ITERATION, the ITERATION bit is set in the
When the USART repetition number reaches MAX_ITERATION, the ITERATION bit is set in the
Channel Status Register (CSR). If the repetition of the character is acknowledged by the
receiver, the repetitions are stopped and the iteration counter is cleared.
The ITERATION bit in CSR can be cleared by writing the Control Register with the RSIT bit at 1.
The ITERATION bit in CSR can be cleared by writing the Control Register with the RSIT bit at 1.
26.7.5.6
Disable Successive Receive NACK
The receiver can limit the number of successive NACKs sent back to the remote transmitter.
This is programmed by setting the bit DSNACK in the Mode Register (MR). The maximum num-
ber of NACK transmitted is programmed in the MAX_ITERATION field. As soon as
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Parity
Bit
Baud Rate
Clock
Start
Bit
Guard
Time 1
Next
Start
Bit
Guard
Time 2
D0
D1
D2
D3
D4
D5
D6
D7
I/O
Parity
Bit
Baud Rate
Clock
Start
Bit
Guard
Time 1
Start
Bit
Guard
Time 2
D0
D1
Error
Repetition
32058K
AVR32-01/12