On Semiconductor NCP3066 Evaluation Board NCP3066SCBCKGEVB NCP3066SCBCKGEVB NCP3066SCBCKGEVB データシート

 (measured vs. Pin 4, unless otherwise noted)

VCC Pin 6

V

CC

0 to +42

V

Comparator Inverting Input Pin 5

V

CII

−0.3 to + V

CC

V

Darlington Switch Collector Pin 1

V

SWC

−0.3 to + 42

V

Darlington Switch Emitter Pin 2 (Transistor OFF)

V

SWE

−0.6 to + V

CC

V

Darlington Switch Collector to Emitter Pins 1−2

V

SWCE

−0.3 to + 42

V

Darlington Switch Current

I

SW

1.5

A

I

pk

 Sense Pin 7

V

IPK

−0.3 to

 

V

CC

+ 0.3

V

Timing Capacitor Pin Voltage (Pin 3)

V

TC

−0.2 to +1.4

V

Moisture Sensitivity Level

MSL

1

−

Lead Temperature Soldering

T

SLD

260

°C

ON/OFF Pin voltage

V

ON/OFF

(−0.3 to +25) < V

CC

V

PDIP−8 (Note 5)

Thermal Resistance Junction−to−Air

R

qJA

100

°C/W

SOIC−8 (Note 5)

Thermal Resistance Junction−to−Air

R

qJA

180

°C/W

DFN−8 (Note 5)

Thermal Resistance Junction−to−Air

Thermal Resistance Junction−to−Case

R

qJA

R

qJC

78

14

°C/W

Storage Temperature Range

T

STG

−65 to +150

°C

Maximum Junction Temperature

T

JMAX

+150

°C

Operating Junction Temperature Range (Note 3)

NCP3066

NCV3066

T

J

0 to +85

−40 to +125

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. This device series contains ESD protection and exceeds the following tests:

Pin 1−8: Human Body Model 2000 V per AEC Q100−002; 003 or JESD22/A114; A115

Machine Model Method 200 V

2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
3. The relation between junction temperature, ambient temperature and Total Power dissipated in IC is T

J

 = T

A

 + 

R

q • 

P

D

.

4. The pins which are not defined may not be loaded by external signals.

5. 35 mm copper, 10 cm

2

 copper area.