STMicroelectronics HVLED805 Demonstration Board STEVAL-ILL037V1 STEVAL-ILL037V1 データシート
製品コード
STEVAL-ILL037V1
HVLED805
Application information
Doc ID 18077 Rev 1
23/29
5.8
Soft-start and starter block
The soft start feature is automatically implemented by the constant current block, as the
primary peak current will be limited from the voltage on the C
primary peak current will be limited from the voltage on the C
LED
capacitor.
During start-up, as the output voltage is zero, the IC will start in CC mode with no high peak
current operations. In this way the voltage on the output capacitor will increase slowly and
the soft-start feature will be ensured.
current operations. In this way the voltage on the output capacitor will increase slowly and
the soft-start feature will be ensured.
Actually the C
LED
value is not important to define the soft-start time, as its duration depends
on others circuit parameters, like transformer ratio, sense resistor, output capacitors and
load. The user will define the best appropriate value by experiments.
load. The user will define the best appropriate value by experiments.
5.9
Hiccup mode OCP
The device is also protected against short circuit of the secondary rectifier, short circuit on
the secondary winding or a hard-saturated flyback transformer. A comparator monitors
continuously the voltage on the R
the secondary winding or a hard-saturated flyback transformer. A comparator monitors
continuously the voltage on the R
SENSE
and activates a protection circuitry if this voltage
exceeds 1 V.
To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
subsequent switching cycle the comparator is not tripped, a temporary disturbance is
assumed and the protection logic will be reset in its idle state; if the comparator will be
tripped again a real malfunction is assumed and the device will be stopped.
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
subsequent switching cycle the comparator is not tripped, a temporary disturbance is
assumed and the protection logic will be reset in its idle state; if the comparator will be
tripped again a real malfunction is assumed and the device will be stopped.
This condition is latched as long as the device is supplied. While it is disabled, however, no
energy is coming from the self-supply circuit; hence the voltage on the V
energy is coming from the self-supply circuit; hence the voltage on the V
CC
capacitor will
decay and cross the UVLO threshold after some time, which clears the latch. The internal
start-up generator is still off, then the V
start-up generator is still off, then the V
CC
voltage still needs to go below its restart voltage
Figure 18.
Load-dependent operating modes: timing diagrams
COMP
I
DS
65 mV
hyster.
Normal-mode
Burst-mode
Normal-mode
T
START
T
START
T
START
T
START
V
COMPL