Analog Devices AD9763 Evaluation Board AD9763-EBZ AD9763-EBZ データシート

 

Rev. G | Page 22 of 44 

The full-scale output current of each DAC is regulated by 
separate reference control amplifiers and can be set from  
2 mA to 20 mA via an external network connected to the full 
scale adjust (FSADJ) pin. The external network, in combination 
with both the reference control amplifier and voltage reference 
(V

REFIO

) sets the reference current I

REF

, which is replicated to the 

segmented current sources with the proper scaling factor. The 
full-scale current (I

OUTFS

) is 32 × I

REF

.  

The AD9763/AD9765/AD9767 contain an internal 1.20 V band 
gap reference. This can easily be overridden by a low noise external 
reference with no effect on performance. REFIO serves as either 
an input or output, depending on whether the internal or an 
external reference is used. To use the internal reference, simply 
decouple the REFIO pin to ACOM with a 0.1 μF capacitor. The 
internal reference voltage is present at REFIO. If the voltage at 
REFIO is used elsewhere in the circuit, an external buffer amplifier 
with an input bias current of less than 100 nA should be used. An 
example of the use of the internal reference is shown in Figure 59. 

0061

7-

059

An external reference can be applied to REFIO as shown in 
Figure 60. The external reference can provide either a fixed 
reference voltage to enhance accuracy and drift performance  
or a varying reference voltage for gain control. The 0.1 μF 
compensation capacitor is not required because the internal 
reference is overridden and the relatively high input impedance 
of REFIO minimizes any loading of the external reference. 

0

06

17

-06

0

 

 

 

 

 

The AD9763/AD9765/AD9767 has two gain control modes, 
independent and master/slave. If the GAINCTRL terminal is low 
(connected to ground), the full-scale currents of DAC1 and DAC2 
are set separately using two different R

SET

 resistors. One resistor 

is connected to the FSADJ1 terminal, and the other resistor is 
connected to the FSADJ2 terminal. This is independent mode. 
If the GAINCTRL terminal is set high (connected to AVDD), 
the full-scale currents of DAC1 and DAC2 are set to the same value 
using one R

SET

 resistor. In master/slave mode, full-scale current 

for both DAC1 and DAC2 is set via the FSADJ1 terminal. 

Both of the DACs in the AD9763/AD9765/AD9767 contain a 
control amplifier that is used to regulate the full-scale output 
current (I

OUTFS

). The control amplifier is configured as a V-I 

converter, as shown in Figure 59, so that its current output (I

REF

) 

is determined by the ratio of the V

REFIO

 and an external resistor, 

R

SET

.  

 = V

/R

  

The DAC full-scale current, I

OUTFS

, is an output current 32 times 

larger than the reference current, I

REF

.  

 = 32 × I

 

The control amplifier allows a wide (10:1) adjustment span of 
I

OUTFS

 from 2 mA to 20 mA by setting I

REF

 between 62.5 μA and 

625 μA. The wide adjustment range of I

OUTFS

 provides several 

benefits. The first relates directly to the power dissipation of the 
AD9763/AD9765/AD9767, which is proportional to I

OUTFS

 (refer to 

the Power Dissipation section). The second relates to the 20 dB 
adjustment, which is useful for system gain control purposes.  

To ensure that the AD9763/AD9765/AD9767 performs properly, 
connect a 22 nF capacitor and 256 Ω resistor network (shown in 
Figure 59 and Figure 60) from the FSADJ1 terminal to ground 
and from the FSADJ2 terminal to ground.