Intel 4 620 JM80547PG0722MM データシート

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TRDY#

Input

TRDY# (Target Ready) is asserted by the target to indicate that it is ready to 
receive a write or implicit writeback data transfer. TRDY# must connect the 
appropriate pins/lands of all FSB agents.

TRST#

Input

TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be 
driven low during power on Reset. 

VCC

Input

VCC are the power pins for the processor. The voltage supplied to these pins is 
determined by the VID[5:0] pins.

VCCA

Input

VCCA provides isolated power for the internal processor core PLLs.

VCCIOPLL

Input

VCCIOPLL

 

provides isolated power for internal processor FSB PLLs.

VCC_SENSE

Output

VCC_SENSE is an isolated low impedance connection to processor core power 
(V

CC

). It can be used to sense or measure voltage near the silicon with little 

noise.

VCC_MB_
REGULATION

Output

This land is provided as a voltage regulator feedback sense point for V

CC

. It is 

connected internally in the processor package to the sense point land U27 as 
described in the Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop 
Socket 775.

VID[5:0]

Output

VID[5:0] (Voltage ID) signals are used to support automatic selection of power 
supply voltages (V

CC

). These are open drain signals that are driven by the 

processor and must be pulled up on the motherboard. Refer to the Voltage 
Regulator-Down (VRD) 10.1 Design Guide for Desktop Socket 775 for more 
information. The voltage supply for these signals must be valid before the VR 
can supply V

CC

 to the processor. Conversely, the VR output must be disabled 

until the voltage supply for the VID signals becomes valid. The VID signals are 
needed to support the processor voltage specification variations. See 

for definitions of these signals. The VR must supply the voltage that is 
requested by the signals, or disable itself.

Contact your Intel representative for further details and documentation.

VSS

Input

VSS are the ground pins for the processor and should be connected to the 
system ground plane. 

VSSA

Input

VSSA is the isolated ground for internal PLLs.

VSS_SENSE

Output

VSS_SENSE is an isolated low impedance connection to processor core V

SS

. It 

can be used to sense or measure ground near the silicon with little noise.

VSS_MB_
REGULATION

Output

This land is provided as a voltage regulator feedback sense point for V

SS

. It is 

connected internally in the processor package to the sense point land V27 as 
described in the Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop 
Socket 775.

VTT

Miscellaneous voltage supply.

VTT_OUT_LEFT

VTT_OUT_RIGHT

Output

The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a 
voltage supply for some signals that require termination to V

TT

 on the 

motherboard. Contact your Intel representative for further details and 
documentation.

For future processor compatibility some signals are required to be pulled up to 
VTT_OUT_LEFT or VTT_OUT_RIGHT. Refer to the following table for the 
signals that should be pulled up to VTT_OUT_LEFT and VTT_OUT_RIGHT.

VTT_OUT_RIGHT

VTT_PWRGOOD, VID[5:0], GTLREF, TMS, TDI, 
TDO, BPM[5:0], other VRD components

VTT_OUT_LEFT

RESET#, BR0#, PWRGOOD, TESTHI1, TESTHI8, 
TESTHI9, TESTHI10, TESTHI11, TESTHI12