Intel III Xeon 550 MHz 80525KY550512 ユーザーズマニュアル

製品コード

80525KY550512

Pentium

III Xeon™ Processor at 500 and 550 MHz

Datasheet

4.3.3

Processor Information ROM and Scratch EEPROM Supported
SMBus Transactions ..............................................................................43

4.3.4

Thermal Sensor......................................................................................43

4.3.5

Thermal Sensor Supported SMBus Transactions .................................. 44

4.3.6

4.3.7

SMBus Device Addressing.....................................................................48

5.0

Thermal Specifications and Design Considerations......................................................... 49

5.1

Thermal Specifications........................................................................................50
5.1.1

Power Dissipation ..................................................................................50

5.1.2

Plate Flatness Specification ...................................................................51

5.2

Processor Thermal Analysis ...............................................................................51
5.2.1

Thermal Solution Performance............................................................... 51

5.2.2

Thermal Plate to Heat Sink Interface Management Guide..................... 52

5.2.3

Measurements for Thermal Specifications............................................. 53
5.2.3.1 Thermal Plate Temperature Measurement ............................... 53
5.2.3.2 Cover Temperature Measurement Guideline ............................ 54

6.0

Mechanical Specifications................................................................................................55

6.1

Weight .................................................................................................................60

6.2

Cartridge to Connector Mating Details ................................................................ 60

6.3

Pentium

III Xeon™ Processor Substrate Edge Finger Signal Listing ............... 62

7.0

Boxed Processor Specifications.......................................................................................71

7.1

Introduction .........................................................................................................71

7.2

Mechanical Specifications...................................................................................71
7.2.1

Boxed Processor Heatsink Dimensions ................................................. 73

7.2.2

Boxed Processor Heatsink Weight......................................................... 73

7.2.3

Boxed Processor Retention Mechanism ................................................ 73

7.3

Thermal Specifications........................................................................................74
7.3.1

Boxed Processor Cooling Requirements ...............................................74

7.3.2

Optional Auxiliary Fan Attachment ......................................................... 74
7.3.2.1 Clearance Recommendations for Auxiliary Fan ........................ 76
7.3.2.2 Fan Power Recommendations for Auxiliary Fan ....................... 77
7.3.2.3 Thermal Evaluation for Auxiliary Fan ........................................ 78

8.0

Integration Tools ..............................................................................................................78

8.1

In-Target Probe (ITP) for Pentium

III Xeon™ Processors................................. 78

8.1.1

Primary Function ....................................................................................79

8.1.2

Debug Port Connector Description......................................................... 79

8.1.3

Debug Port Signal Descriptions ............................................................. 80

8.1.4

Debug Port Signal Notes........................................................................82
8.1.4.1 General Signal Quality Notes .................................................... 83
8.1.4.2 Signal Note: DBRESET#........................................................... 83
8.1.4.3 Signal Note: TDO and TDI ........................................................ 83
8.1.4.4 Signal Note: TCK.......................................................................83

8.1.5

Using Boundary Scan to Communicate to the Processor ...................... 85