Intel 1020E AV8063801276200 ユーザーズマニュアル
製品コード
AV8063801276200
Introduction
14
Datasheet, Volume 1
1.2.3
Direct Media Interface (DMI)
• DMI 2.0 support
• Four lanes in each direction
• 5 GT/s point-to-point DMI interface to PCH is supported
• Raw bit-rate on the data pins of 5.0 Gb/s, resulting in a real bandwidth per pair of
• Four lanes in each direction
• 5 GT/s point-to-point DMI interface to PCH is supported
• Raw bit-rate on the data pins of 5.0 Gb/s, resulting in a real bandwidth per pair of
500 MB/s given the 8b/10b encoding used to transmit data across this interface.
Does not account for packet overhead and link maintenance.
Does not account for packet overhead and link maintenance.
• Maximum theoretical bandwidth on interface of 2 GB/s in each direction
simultaneously, for an aggregate of 4 GB/s when DMI x4
• Shares 100-MHz PCI Express* reference clock
• 64-bit downstream address format; however, the processor never generates an
• 64-bit downstream address format; however, the processor never generates an
address above 64 GB (Bits 63:36 will always be zeros)
• 64-bit upstream address format, but the processor responds to upstream read
transactions to addresses above 64 GB (addresses where any of Bits 63:36 are
nonzero) with an Unsupported Request response. Upstream write transactions to
addresses above 64 GB will be dropped.
nonzero) with an Unsupported Request response. Upstream write transactions to
addresses above 64 GB will be dropped.
• Supports the following traffic types to or from the PCH:
— DMI -> DRAM
— DMI -> processor core (Virtual Legacy Wires (VLWs), Resetwarn, or MSIs only)
— Processor core -> DMI
• APIC and MSI interrupt messaging support:
— Message Signaled Interrupt (MSI and MSI-X) messages
• Downstream SMI, SCI and SERR error indication
• Legacy support for ISA regime protocol (PHOLD / PHOLDA) required for parallel
• Legacy support for ISA regime protocol (PHOLD / PHOLDA) required for parallel
port DMA, floppy drive, and LPC bus masters
• DC coupling – no capacitors between the processor and the PCH
• Polarity inversion
• PCH end-to-end lane reversal across the link
• Supports Half Swing “low-power / low-voltage”
• Polarity inversion
• PCH end-to-end lane reversal across the link
• Supports Half Swing “low-power / low-voltage”
1.2.4
Platform Environment Control Interface (PECI)
The PECI is a one-wire interface that provides a communication channel between a
PECI client (the processor) and a PECI master. The processor supports the PECI 3.0
Specification.
PECI client (the processor) and a PECI master. The processor supports the PECI 3.0
Specification.
1.2.5
Processor Graphics
• The Processor Graphics contains a refresh of the seventh generation graphics core
enabling substantial gains in performance and lower power consumption. Up to
16 EU support.
16 EU support.
• Next Generation Intel Clear Video Technology HD Support is a collection of video
playback and enhancement features that improve the end user’s viewing
experience
experience
— Encode / transcode HD content
— Playback of high definition content including Blu-ray Disc*
— Superior image quality with sharper, more colorful images
— Playback of Blu-ray Disc* S3D content using HDMI* (V.1.4 with 3D)
— Playback of high definition content including Blu-ray Disc*
— Superior image quality with sharper, more colorful images
— Playback of Blu-ray Disc* S3D content using HDMI* (V.1.4 with 3D)