Intel E3815 FH8065301567411 データシート
製品コード
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2321
18.7.181 xHC Latency Tolerance Parameters LTV Control 2
(XLTP_LTV2)—Offset 8178h
Access Method
Default: 000017FFh
18.7.182 xHC Latency Tolerance Parameters - High Idle Time Control
(XLTP_HITC)—Offset 817Ch
Access Method
11:0
47Dh
RW
USB2 Port L0 LTV (USB2_PL0_LTV):
•
•
11:10 Latency Scale
•
00b = Reserved
•
01b = Latency Value to be multiplied by 1024
•
10b = Latency Value to be multiplied by 32,768
•
11b = Latency Value to be multiplied by 1,048,576
•
•
9:0 Latency Value Defaults to 128 Microseconds(ns)
Power Well:
Core
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1
RSVD
LT
V
_
LM
T
Bit
Range
Default &
Access
Field Name (ID): Description
31:13
00000h
RO
Reserved (RSVD):
Reserved.
Power Well:
Core
12:0
17FFh
RW
LTV Limit (LTV_LMT):
This register defines a maximum LTR value that is allowed to be
advertised to the PMC. This is meant to be used as a workaround or mitigation if issues
are discovered with the LTR values generated by the XHC using the defined algorithms.
If the LTR value of the XHC is larger than the value in this register field, the value in this
field is sent to the PMC instead. Default value is the highest possible - 101b
•
•
12:10: Latency Multiplier Field
•
000b - Value times 1 ns
•
001b - Value times 32 ns
•
010b - Value times 1,024 ns
•
011b - Value times 32,768 ns
•
100b - Value times 1,048,576 ns
•
101b - Value times 33,554,432 ns
•
110b-111b - Not Permitted
•
9:0: Latency Value Default = 3FFh
Power Well:
Core