Intel E3815 FH8065301567411 データシート
製品コード
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
424
Datasheet
14.9.7
GMADR_LSB—Offset 18h
Gfx Aperture location. SOXi Context Save/Restore : Yes GMADR is a Prefetchable range
in order to apply USWC attribute (from the processor point of view) to that range. The
USWC attribute is used by the processor for write combining. Accesses to this range
will be translated to DRAM Physical memory addresses. Fence registers may be used to
sub-divide this range and allow tiled surfaces (determined by fence registers). The
following sizes are supported : 128MB, 256MB, 512MB. (Determined by the MSAC
register)
Access Method
Default: 00000008h
14.9.8
GMADR_MSB—Offset 1Ch
Access Method
Default: 00000000h
Type:
PCI Configuration Register
(Size: 32 bits)
GMADR_LSB:
Power Well:
Core
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
RSV
D
_0
AD
M
S
K512_1
AD
M
S
K256_2
RSV
D
_3
P
R
E
FMEM_4
ME
M
T
YP_5
RSV
D
_6
Bit
Range
Default &
Access
Description
31:29
000b
RO
RSVD (RSVD_0):
Memory Base Address (MBA): Memory Base Address (MBA): Set by
the OS, these bits correspond to address signals [35:29].
28
0b
RW/L
ADMSK512 (ADMSK512_1):
512MB Address Mask (ADMSK512): This bit is either
part of the Memory Base Address (R/W) or part of the Address Mask (RO), depending on
the value of MSAC[2:1]. See MSAC (Dev2, Func 0, offset 62h) for details.
27
0b
RW/L
ADMSK256 (ADMSK256_2):
256MB Address Mask (ADMSK256): This bit is either
part of the Memory Base Address (R/W) or part of the Address Mask (RO), depending on
the value of MSAC[2:1]. See MSAC (Dev 2, Func 0, offset 62h) for details.
26:4
0000000h
RO
RSVD (RSVD_3):
Address Mask (ADM): Hardwired to 0s to indicate at least 128MB
address range.
3
1b
RO
PREFMEM (PREFMEM_4):
Prefetchable Memory (PREFMEM): Hardwired to 1 to enable
prefetching.
2:1
00b
RO
MEMTYP (MEMTYP_5):
Memory Type (MEMTYP): 00 : To indicate 32 bit base address
01: Reserved 10 : To indicate 64 bit base address 11: Reserved
0
0b
RO
RSVD (RSVD_6):
Memory/IO Space (MIOS): Hardwired to 0 to indicate memory
space.
Type:
PCI Configuration Register
(Size: 32 bits)
Power Well:
Core