Renesas R61509V ユーザーズマニュアル

Rev. 0.11 April 25, 2008, page 124 of 181  

 

The timing relationship of signals in RGB interface operation is as follows. 

1H

1 clock

 1H or more

One frame

Back porch period

Front porch period

HLW 

҈

 1CLK

DTST 

҈

 1CLK

VSYNCX

HSYNCX

DOTCLK

ENABLE

DB17-0

VSYNCX

HSYNCX

DOTCLK

ENABLE

DB17-0

Valid data

 

Note:  VLW: 

VSYNCX Low period 

 

HLW: 

HSYNCX Low period 

 

DTST:  data transfer setup time