Intel 440GX ユーザーズマニュアル
Intel
®
440GX AGPset Design Guide
2-11
Motherboard Layout and Routing Guidelines
2.3.7
Design Methodology
Intel recommends using the following design methodology when designing systems based on one
or two Intel
or two Intel
®
Pentium
®
II processors and one Intel
®
440GX AGPset. The methodology evolved
from Intel’s experience developing and validating high speed GTL+ bus designs for the Intel
®
Pentium
®
Pro and Intel
®
Pentium
®
II processors.
The methodology provides a step-by-step process which is summarized in
Figure 2-12
. The
process begins with an initial timing analysis and topology definition. Timing and topology
recommendations are included in this section. The heart of the methodology is structured around
extensive simulations and analysis prior to board layout. This represents a significant departure
from traditional design methods. The pre-layout simulations provide a detailed picture of the
working “solution space” for the design. By basing the board layout guidelines on the solution
space, the need to iterate between layout and post-layout simulation is minimized. The
methodology includes specific recommendations for analytical techniques and simulation
conditions. Following layout, simulation with the extracted design database is used to verify that
the design meets flight time and signal quality requirements prior to building hardware. Finally,
validation verifies that the system meets 100 MHz timing and signal quality requirements with
actual hardware.
recommendations are included in this section. The heart of the methodology is structured around
extensive simulations and analysis prior to board layout. This represents a significant departure
from traditional design methods. The pre-layout simulations provide a detailed picture of the
working “solution space” for the design. By basing the board layout guidelines on the solution
space, the need to iterate between layout and post-layout simulation is minimized. The
methodology includes specific recommendations for analytical techniques and simulation
conditions. Following layout, simulation with the extracted design database is used to verify that
the design meets flight time and signal quality requirements prior to building hardware. Finally,
validation verifies that the system meets 100 MHz timing and signal quality requirements with
actual hardware.