Renesas R5S72641 ユーザーズマニュアル
Section 17 I
2
C Bus Interface 3
R01UH0134EJ0400 Rev. 4.00
Page 855 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Table 17.3 Transfer Rate
NF2CYC ICCR1
Clock
Transfer Rate (kHz)
Remarks
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
P
=
20.0 MHz
P
=
24.0 MHz
P
=
32.0 MHz
P
=
36.0 MHz
CKS4*
1
CKS3 CKS2 CKS1 CKS0
0 0 0 0 0 P
/44
455 545 727 818
1
P
/52
385 462 615 692
1
0
P
/64
313 375 500 563
1
P
/72
278 333 444 500
1 0 0 P
/84
238 286 381 429
1
P
/92
217 261 348 391
1
0
P
/100
200 240 320 360
1
P
/108
185 222 296 333
1 0 0 0 P
/176
114 136 182 205
1
P
/208
96.2 115 154 173
1
0
P
/256 78.1
93.8
125
141
1
P
/288 69.4
83.3
111
125
1 0 0 P
/336
59.5 71.4 95.2 107
1
P
/368
54.3 65.2 87.0 97.8
1
0
P
/400
50.0 60.0 80.0 90.0
1
P
/432
46.3 55.6 74.1 83.3
1 0 0 0 0 P
/352
56.8 68.2 90.9 102 *
2
1
P
/416
48.1 57.7 76.9 86.5
1
0
P
/512
39.1 46.9 62.5 70.3
1
P
/576
34.7 41.7 55.6 62.5
1 0 0 P
/672
29.8 35.7 47.6 53.6
1
P
/736
27.2 32.6 43.5 48.9
1
0
P
/800
25.0 30.0 40.0 45.0
1
P
/864
23.1 27.8 37.0 41.7
1 0 0 0 P
/704
28.4 34.1 45.5 51.1
1
P
/832
24.0 28.8 38.5 43.3
1
0
P
/1024
19.5 23.4 31.3 35.2
1
P
/1152
17.4 20.8 27.8 31.3
1 0 0 P
/1344
14.9 17.9 23.8 26.8
1
P
/1472
13.6 16.3 21.7 24.5
1
0
P
/1600
12.5 15.0 20.0 22.5
1
P
/1728
11.6 13.9 18.5 20.8
Notes: The settings should satisfy external specifications.
1.
This bit is reserved for 1-Mbyte version.
2.
These settings are valid only in 640-Kbyte version.