Mitsubishi Electronics FX2N ユーザーズマニュアル
FX Series Programmable Controllers
STL Programming 3
3-14
3.9
General Rules For Successful STL Branching
For each branch point 8 further branches may be programmed. There are no limits to the num-
ber of states contained in a single STL flow. Hence, the possibility exists for a single initial state
to branch to 8 branch flows which in turn could each branch to a further 8 branch flows etc. If
the programmable controllers program is read/written using instruction or ladder formats the
above rules are acceptable. However, users of the FX-PCS/AT-EE programming package who
are utilizing the STL programming feature are constrained by further restrictions to enable
automatic STL program conversions (please see page 3-15 for more details).
When using branches, different types of branching /merging cannot be mixed at the same
branch point. The item marked with a ‘S’ are transfer condition which are not permitted.
ber of states contained in a single STL flow. Hence, the possibility exists for a single initial state
to branch to 8 branch flows which in turn could each branch to a further 8 branch flows etc. If
the programmable controllers program is read/written using instruction or ladder formats the
above rules are acceptable. However, users of the FX-PCS/AT-EE programming package who
are utilizing the STL programming feature are constrained by further restrictions to enable
automatic STL program conversions (please see page 3-15 for more details).
When using branches, different types of branching /merging cannot be mixed at the same
branch point. The item marked with a ‘S’ are transfer condition which are not permitted.
The following branch configurations/modifications are recommended:
S 40
S 30
S 20
S 60
S 50
X0
X0
X1
S 30
S 20
S 30
S 20
X2
X1
X0
X0
X1
X2
S 60
S 50
X3
X4
S 30
S 40
S 20
X0
X1
X2
S 60
S 50
X3
X4
S 30
S 40
S 20
S 100
(S100)
(S100)
S 40
S 30
S 20
S 60
S 50
X0
S 101
(S101)
20
0
100
30
1
100
40
2
100
100
100
100
100
3
50
100
4
60
S
X
S
S
X
S
S
X
S
S
S
X
S
S
X
S
X
S
S
X
S
S
X
S
S
S
X
S
S
X
S
STL
LD
SET
STL
LD
SET
STL
LD
SET
STL
LD
AND
SET
LD
AND
SET
LD
SET
STL
LD
SET
STL
LD
SET
STL
LD
AND
SET
LD
AND
SET
S 50
S 40
S 50
S 40
X0
X1
S 30
S 20
(S102)
S 50
S 40
S 30
S 20
X1
X2
(S103)
S 103
S 102
(S103)
X0
S 50
S 40
20
30
40
30
40
0
101
101
101
101
101
50
60
60
S
S
S
X
S
S
S
S
S
S
S
X
S
S
S
S
S
STL
STL
STL
LD
SET
STL
LD
SET
SET
STL
STL
LD
SET
STL
LD
SET
SET
STL
LD
SET
STL
LD
SET
STL
LD
SET
SET
LD
SET
STL
LD
SET
STL
LD
SET
SET
S
X
S
S
X
S
S
S
S
S
X
S
S
X
S
S
S
S
S
20
0
102
30
102
102
102
102
102
40
50
50
1
STL
STL
LD
STL
LD
S
S
X
S
S
S
X
S
S
X
S
S
X
S
S
S
X
S
S
X
S
SET
STL
LD
AND
SET
LD
AND
SET
STL
LD
AND
SET
LD
AND
SET
20
30
30
0
103
103
103
103
103
1
40
103
2
50
Rewrite as
Rewrite as
Dummy state
Dummy
state
state
Dummy
state
state
Dummy
state
state
In Instruction
format...
format...
In Instruction
format...
format...