Intel Core 2 Quad Q9505 AT80580PJ0736MG ユーザーズマニュアル
製品コード
AT80580PJ0736MG
Datasheet
29
Electrical Specifications
3.8
CMOS Signals
CMOS input signals are shown in
. Legacy output FERR#, IERR# and other non-
AGTL+ signals (THERMTRIP# and PROCHOT#) use Open Drain output buffers. These
signals do not have setup or hold time specifications in relation to BCLK[1:0]. However,
all of the CMOS signals are required to be asserted for more than four BCLKs for the
processor to recognize them. See
for DC specifications for the CMOS
signal groups.
3.9
Maximum Ratings
specifies absolute maximum and minimum ratings only and these lie outside
the functional limits of the processor. Only within functional operation limits,
functionality and long-term reliability can be expected.
At conditions outside functional operation condition limits, but within absolute
maximum and minimum ratings, neither functionality nor long-term reliability can be
expected. If a device is returned to conditions within functional operation limits after
having been subjected to conditions outside these limits, but within the absolute
maximum and minimum ratings, the device may be functional, but with its lifetime
degraded.
At conditions exceeding the absolute maximum and minimum ratings, neither
functionality nor long-term reliability can be expected. Moreover, if a device is
subjected to these conditions for any length of time then, when returned to conditions
within the functional operating condition limits, it will either not function or its reliability
will be severely degraded.
Although the processor contains protective circuitry to resist damage from static
electric discharge, precautions should always be taken to avoid high static voltages or
electric fields.
NOTES:
1.
1.
For functional operation, all processor electrical, signal quality, mechanical and thermal
specifications must be satisfied.
specifications must be satisfied.
2.
Storage temperature is applicable to storage conditions only. In this scenario, the
processor must not receive a clock, and no lands can be connected to a voltage bias.
Storage within these limits will not affect the long-term reliability of the device. For
functional operation, please refer to the processor case temperature specifications.
processor must not receive a clock, and no lands can be connected to a voltage bias.
Storage within these limits will not affect the long-term reliability of the device. For
functional operation, please refer to the processor case temperature specifications.
3.
This rating applies to the processor and does not include any tray or packaging.
4.
Failure to adhere to this specification can affect the long-term reliability of the processor.
Table 6.
Processor Absolute Maximum Ratings
Symbol
Parameter
Min
Max Unit Notes
1,5
T
STORAGE
Processor Storage Temperature
-40
85
°C
2,3,4
V
CC
Any Processor Supply Voltage with Respect
to V
to V
SS
-0.3
1.45
V
V
inAGTL+
AGTL+ Buffer DC Input Voltage with
Respect to V
Respect to V
SS
-0.1
1.45
V
V
inAsynch_CMOS
CMOS Buffer DC Input Voltage with Respect
to V
to V
SS
-0.1
1.45
V