Agilent Technologies 1660AS ユーザーズマニュアル
Event Status Register
The Event Status Register is an IEEE 488.2 defined register. The bits in this
register are "latched." That is, once an event happens which sets a bit, that
bit will only be cleared if the register is read.
register are "latched." That is, once an event happens which sets a bit, that
bit will only be cleared if the register is read.
Service Request Enable Register
The Service Request Enable Register is an 8-bit register. Each bit enables
the corresponding bit in the status byte to cause a service request. The sixth
bit does not logically exist and is always returned as a zero. To read and
write to this register, use the *SRE? and *SRE commands.
the corresponding bit in the status byte to cause a service request. The sixth
bit does not logically exist and is always returned as a zero. To read and
write to this register, use the *SRE? and *SRE commands.
Bit Definitions
The following mnemonics are used in figure 6-1 and in chapter 8, "Common
Commands:"
Commands:"
MAV - message available
Indicates whether there is a response in the output queue.
ESB - event status bit
Indicates if any of the conditions in the Standard Event Status Register are
set and enabled.
set and enabled.
MSS - master summary status
Indicates whether the device has a reason for requesting service. This bit is
returned for the *STB? query.
returned for the *STB? query.
RQS - request service
Indicates if the device is requesting service. This bit is returned during a
serial poll. RQS will be set to 0 after being read via a serial poll (MSS is not
reset by *STB?).
serial poll. RQS will be set to 0 after being read via a serial poll (MSS is not
reset by *STB?).
Status Reporting
Event Status Register
Event Status Register
6–4